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[xen staging] xen/arm: gic-v3: Add missing breaks gicv3_read_apr()



commit 43d4cc7d36503bcc3aa2aa6ebea2b7912808f254
Author:     Julien Grall <jgrall@xxxxxxxxxx>
AuthorDate: Wed May 12 18:35:48 2021 +0100
Commit:     Stefano Stabellini <sstabellini@xxxxxxxxxx>
CommitDate: Wed May 12 13:23:48 2021 -0700

    xen/arm: gic-v3: Add missing breaks gicv3_read_apr()
    
    Commit 78e67c99eb3f "arm/gic: Get rid of READ/WRITE_SYSREG32"
    mistakenly converted all the cases in gicv3_read_apr() to fall-through.
    
    Rather than re-instating a return per case, add the missing break and
    keep a single return at the end of the fucntion.
    
    Fixes: 78e67c99eb3f ("arm/gic: Get rid of READ/WRITE_SYSREG32")
    Signed-off-by: Julien Grall <jgrall@xxxxxxxxxx>
    Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>
---
 xen/arch/arm/gic-v3.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
index b86f040589..9a3a175ad7 100644
--- a/xen/arch/arm/gic-v3.c
+++ b/xen/arch/arm/gic-v3.c
@@ -1167,12 +1167,15 @@ static unsigned int gicv3_read_apr(int apr_reg)
     case 0:
         ASSERT(gicv3.nr_priorities > 4 && gicv3.nr_priorities < 8);
         apr = READ_SYSREG(ICH_AP1R0_EL2);
+        break;
     case 1:
         ASSERT(gicv3.nr_priorities > 5 && gicv3.nr_priorities < 8);
         apr = READ_SYSREG(ICH_AP1R1_EL2);
+        break;
     case 2:
         ASSERT(gicv3.nr_priorities > 6 && gicv3.nr_priorities < 8);
         apr = READ_SYSREG(ICH_AP1R2_EL2);
+        break;
     default:
         BUG();
     }
--
generated by git-patchbot for /home/xen/git/xen.git#staging



 


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