[xen staging] VT-d: use DMA_TLB_IVA_ADDR()

[patchbot@xxxxxxx]

commit 635de3c928c63b5b5c6f31349856547c81c03c8e
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Tue Jan 4 10:18:18 2022 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Tue Jan 4 10:18:18 2022 +0100

    VT-d: use DMA_TLB_IVA_ADDR()
    
    Let's use the macro in the one place it's supposed to be used, and in
    favor of then unnecessary manipulations of the address in
    iommu_flush_iotlb_psi(): All leaf functions then already deal correctly
    with the supplied address.
    
    There also has never been a need to require (i.e. assert for) the
    passing in of 4k-aligned addresses - it'll always be the order-sized
    range containing the address which gets flushed.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>
---
 xen/drivers/passthrough/vtd/iommu.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c 
b/xen/drivers/passthrough/vtd/iommu.c
index 806dd32485..2d0946801e 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -584,7 +584,8 @@ int vtd_flush_iotlb_reg(struct vtd_iommu *iommu, uint16_t 
did, uint64_t addr,
     if ( type == DMA_TLB_PSI_FLUSH )
     {
         /* Note: always flush non-leaf currently. */
-        dmar_writeq(iommu->reg, tlb_offset, size_order | addr);
+        dmar_writeq(iommu->reg, tlb_offset,
+                    size_order | DMA_TLB_IVA_ADDR(addr));
     }
     dmar_writeq(iommu->reg, tlb_offset + 8, val);
 
@@ -644,8 +645,6 @@ static int __must_check iommu_flush_iotlb_psi(struct 
vtd_iommu *iommu, u16 did,
 {
     int status;
 
-    ASSERT(!(addr & (~PAGE_MASK_4K)));
-
     /* Fallback to domain selective flush if no PSI support */
     if ( !cap_pgsel_inv(iommu->cap) )
         return iommu_flush_iotlb_dsi(iommu, did, flush_non_present_entry,
@@ -656,9 +655,6 @@ static int __must_check iommu_flush_iotlb_psi(struct 
vtd_iommu *iommu, u16 did,
         return iommu_flush_iotlb_dsi(iommu, did, flush_non_present_entry,
                                      flush_dev_iotlb);
 
-    addr >>= PAGE_SHIFT_4K + order;
-    addr <<= PAGE_SHIFT_4K + order;
-
     /* apply platform specific errata workarounds */
     vtd_ops_preamble_quirk(iommu);
 
--
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