[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging] x86/spec-ctrl: Fix default calculation of opt_srb_lock
commit 31f3bc97f4508687215e459a5e35676eecf1772b Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> AuthorDate: Tue Jan 4 14:11:55 2022 +0000 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Wed Jan 5 09:44:26 2022 +0000 x86/spec-ctrl: Fix default calculation of opt_srb_lock Since this logic was introduced, opt_tsx has become more complicated and shouldn't be compared to 0 directly. While there are no buggy logic paths, the correct expression is !(opt_tsx & 1) but the rtm_disabled boolean is easier and clearer to use. Fixes: 8fe24090d940 ("x86/cpuid: Rework HLE and RTM handling") Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> --- xen/arch/x86/spec_ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index a5569c7f2b..c18cc8aa49 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -1245,7 +1245,7 @@ void __init init_speculation_mitigations(void) */ if ( opt_srb_lock == -1 && (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO && - (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && opt_tsx == 0)) ) + (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) ) opt_srb_lock = 0; val &= ~MCU_OPT_CTRL_RNGDS_MITG_DIS; -- generated by git-patchbot for /home/xen/git/xen.git#staging
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