[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging-4.14] x86/spec-ctrl: Fix default calculation of opt_srb_lock
commit 45299b3cc83d3d19c24d74f7e28dcc83e8fa0c2e Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> AuthorDate: Fri Jan 7 08:54:38 2022 +0100 Commit: Jan Beulich <jbeulich@xxxxxxxx> CommitDate: Fri Jan 7 08:54:38 2022 +0100 x86/spec-ctrl: Fix default calculation of opt_srb_lock Since this logic was introduced, opt_tsx has become more complicated and shouldn't be compared to 0 directly. While there are no buggy logic paths, the correct expression is !(opt_tsx & 1) but the rtm_disabled boolean is easier and clearer to use. Fixes: 8fe24090d940 ("x86/cpuid: Rework HLE and RTM handling") Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> master commit: 31f3bc97f4508687215e459a5e35676eecf1772b master date: 2022-01-05 09:44:26 +0000 --- xen/arch/x86/spec_ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 7e0c171dc8..f70535b6e7 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -1197,7 +1197,7 @@ void __init init_speculation_mitigations(void) */ if ( opt_srb_lock == -1 && (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO && - (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && opt_tsx == 0)) ) + (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) ) opt_srb_lock = 0; val &= ~MCU_OPT_CTRL_RNGDS_MITG_DIS; -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.14
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