[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen stable-4.15] x86/msr: Split MSR_SPEC_CTRL handling
commit 2e4507eb358b580378b0a7aaa6d357401abbca88 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> AuthorDate: Tue Jan 25 13:45:58 2022 +0100 Commit: Jan Beulich <jbeulich@xxxxxxxx> CommitDate: Tue Jan 25 13:45:58 2022 +0100 x86/msr: Split MSR_SPEC_CTRL handling In order to fix a VT-x bug, and support MSR_SPEC_CTRL on AMD, move MSR_SPEC_CTRL handling into the new {pv,hvm}_{get,set}_reg() infrastructure. Duplicate the msrs->spec_ctrl.raw accesses in the PV and VT-x paths for now. The SVM path is currently unreachable because of the CPUID policy. No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> master commit: 6536688439dbca1d08fd6db5be29c39e3917fb2f master date: 2022-01-20 16:32:11 +0000 --- xen/arch/x86/hvm/vmx/vmx.c | 7 +++++++ xen/arch/x86/msr.c | 22 +++++++++++++++++----- xen/arch/x86/pv/emulate.c | 9 +++++++++ 3 files changed, 33 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index d1814c075d..8e53a51a17 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2416,6 +2416,9 @@ static uint64_t vmx_get_reg(struct vcpu *v, unsigned int reg) switch ( reg ) { + case MSR_SPEC_CTRL: + return v->arch.msrs->spec_ctrl.raw; + default: printk(XENLOG_G_ERR "%s(%pv, 0x%08x) Bad register\n", __func__, v, reg); @@ -2430,6 +2433,10 @@ static void vmx_set_reg(struct vcpu *v, unsigned int reg, uint64_t val) switch ( reg ) { + case MSR_SPEC_CTRL: + v->arch.msrs->spec_ctrl.raw = val; + break; + default: printk(XENLOG_G_ERR "%s(%pv, 0x%08x, 0x%016"PRIx64") Bad register\n", __func__, v, reg, val); diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 75b89777a2..79d40a0074 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -28,6 +28,7 @@ #include <asm/hvm/nestedhvm.h> #include <asm/hvm/viridian.h> #include <asm/msr.h> +#include <asm/pv/domain.h> #include <asm/setup.h> #include <public/hvm/params.h> @@ -250,8 +251,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) case MSR_SPEC_CTRL: if ( !cp->feat.ibrsb ) goto gp_fault; - *val = msrs->spec_ctrl.raw; - break; + goto get_reg; case MSR_INTEL_PLATFORM_INFO: *val = mp->platform_info.raw; @@ -409,6 +409,13 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) return ret; + get_reg: /* Delegate register access to per-vm-type logic. */ + if ( is_pv_domain(d) ) + *val = pv_get_reg(v, msr); + else + *val = hvm_get_reg(v, msr); + return X86EMUL_OKAY; + gp_fault: return X86EMUL_EXCEPTION; } @@ -498,9 +505,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) if ( val & rsvd ) goto gp_fault; /* Rsvd bit set? */ - - msrs->spec_ctrl.raw = val; - break; + goto set_reg; case MSR_PRED_CMD: if ( !cp->feat.ibrsb && !cp->extd.ibpb ) @@ -648,6 +653,13 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) return ret; + set_reg: /* Delegate register access to per-vm-type logic. */ + if ( is_pv_domain(d) ) + pv_set_reg(v, msr, val); + else + hvm_set_reg(v, msr, val); + return X86EMUL_OKAY; + gp_fault: return X86EMUL_EXCEPTION; } diff --git a/xen/arch/x86/pv/emulate.c b/xen/arch/x86/pv/emulate.c index ae049b60f2..0a7907ec5e 100644 --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -92,12 +92,16 @@ void pv_emul_instruction_done(struct cpu_user_regs *regs, unsigned long rip) uint64_t pv_get_reg(struct vcpu *v, unsigned int reg) { + const struct vcpu_msrs *msrs = v->arch.msrs; struct domain *d = v->domain; ASSERT(v == current || !vcpu_runnable(v)); switch ( reg ) { + case MSR_SPEC_CTRL: + return msrs->spec_ctrl.raw; + default: printk(XENLOG_G_ERR "%s(%pv, 0x%08x) Bad register\n", __func__, v, reg); @@ -108,12 +112,17 @@ uint64_t pv_get_reg(struct vcpu *v, unsigned int reg) void pv_set_reg(struct vcpu *v, unsigned int reg, uint64_t val) { + struct vcpu_msrs *msrs = v->arch.msrs; struct domain *d = v->domain; ASSERT(v == current || !vcpu_runnable(v)); switch ( reg ) { + case MSR_SPEC_CTRL: + msrs->spec_ctrl.raw = val; + break; + default: printk(XENLOG_G_ERR "%s(%pv, 0x%08x, 0x%016"PRIx64") Bad register\n", __func__, v, reg, val); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15
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