[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging] x86/cpuid: Infrastructure for leaf 7:1.ebx
commit e1828e3032ebfe036023cd733adfd2d4ec856688 Author: Jan Beulich <jbeulich@xxxxxxxx> AuthorDate: Thu Jan 27 12:54:42 2022 +0000 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Thu Jan 27 17:38:15 2022 +0000 x86/cpuid: Infrastructure for leaf 7:1.ebx Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- tools/misc/xen-cpuid.c | 5 +++++ xen/arch/x86/cpu/common.c | 3 ++- xen/include/public/arch-x86/cpufeatureset.h | 2 ++ xen/include/xen/lib/x86/cpuid.h | 7 +++++++ 4 files changed, 16 insertions(+), 1 deletion(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index a3003245f1..17e67e379f 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -195,6 +195,10 @@ static const char *const str_e21a[32] = [ 6] = "nscb", }; +static const char *const str_7b1[32] = +{ +}; + static const struct { const char *name; const char *abbr; @@ -213,6 +217,7 @@ static const struct { { "0x00000007:0.edx", "7d0", str_7d0 }, { "0x00000007:1.eax", "7a1", str_7a1 }, { "0x80000021.eax", "e21a", str_e21a }, + { "0x00000007:1.ebx", "7b1", str_7b1 }, }; #define COL_ALIGN "18" diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index c6773c85fd..d4f5028fa2 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -445,7 +445,8 @@ static void generic_identify(struct cpuinfo_x86 *c) if (max_subleaf >= 1) cpuid_count(7, 1, &c->x86_capability[FEATURESET_7a1], - &tmp, &tmp, &tmp); + &c->x86_capability[FEATURESET_7b1], + &tmp, &tmp); } if (c->cpuid_level >= 0xd) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 0b39937556..588f924de5 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -299,6 +299,8 @@ XEN_CPUFEATURE(FSRCS, 10*32+12) /*A Fast Short REP CMPSB/SCASB */ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ XEN_CPUFEATURE(NSCB, 11*32+ 6) /*A Null Selector Clears Base (and limit too) */ +/* Intel-defined CPU features, CPUID level 0x00000007:1.ebx, word 12 */ + #endif /* XEN_CPUFEATURE */ /* Clean up from a default include. Close the enum (for C). */ diff --git a/xen/include/xen/lib/x86/cpuid.h b/xen/include/xen/lib/x86/cpuid.h index a4d254ea96..e87036b303 100644 --- a/xen/include/xen/lib/x86/cpuid.h +++ b/xen/include/xen/lib/x86/cpuid.h @@ -16,6 +16,7 @@ #define FEATURESET_7d0 9 /* 0x00000007:0.edx */ #define FEATURESET_7a1 10 /* 0x00000007:1.eax */ #define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ struct cpuid_leaf { @@ -188,6 +189,10 @@ struct cpuid_policy uint32_t _7a1; struct { DECL_BITFIELD(7a1); }; }; + union { + uint32_t _7b1; + struct { DECL_BITFIELD(7b1); }; + }; }; } feat; @@ -327,6 +332,7 @@ static inline void cpuid_policy_to_featureset( fs[FEATURESET_7d0] = p->feat._7d0; fs[FEATURESET_7a1] = p->feat._7a1; fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; } /* Fill in a CPUID policy from a featureset bitmap. */ @@ -345,6 +351,7 @@ static inline void cpuid_featureset_to_policy( p->feat._7d0 = fs[FEATURESET_7d0]; p->feat._7a1 = fs[FEATURESET_7a1]; p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; } static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) -- generated by git-patchbot for /home/xen/git/xen.git#staging
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