[xen staging] x86/Intel: re-indent family 6 switch() in intel_log_freq()

[patchbot@xxxxxxx]

commit 3e548a6379bc0b1b79a20d12aeb4faed2833a4a7
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Fri Feb 18 09:00:10 2022 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Fri Feb 18 09:00:10 2022 +0100

    x86/Intel: re-indent family 6 switch() in intel_log_freq()
    
    This was left at its previous indentation by e6e3cf191d37 ("x86/Intel:
    also display CPU freq for family 0xf") to ease review. Remove the now
    unnecessary level of indentation.
    
    No functional change.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Acked-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
---
 xen/arch/x86/cpu/intel.c | 54 +++++++++++++++++++++++-------------------------
 1 file changed, 26 insertions(+), 28 deletions(-)

diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 699add6a4a..d7c6e2bd7d 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -468,35 +468,33 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
         if ( !max_ratio )
             return;
 
+        switch ( c->x86_model )
         {
-            switch ( c->x86_model )
-            {
-            case 0x0e: /* Core */
-            case 0x0f: case 0x16: case 0x17: case 0x1d: /* Core2 */
-                /*
-                 * PLATFORM_INFO, while not documented for these, appears to
-                 * exist in at least some cases, but what it holds doesn't
-                 * match the scheme used by newer CPUs.  At a guess, the min
-                 * and max fields look to be reversed, while the scaling
-                 * factor is encoded in FSB_FREQ.
-                 */
-                if ( min_ratio > max_ratio )
-                    SWAP(min_ratio, max_ratio);
-                if ( rdmsr_safe(MSR_FSB_FREQ, msrval) ||
-                     (msrval &= 7) >= ARRAY_SIZE(core_factors) )
-                    return;
-                factor = core_factors[msrval];
-                break;
-
-            case 0x1a: case 0x1e: case 0x1f: case 0x2e: /* Nehalem */
-            case 0x25: case 0x2c: case 0x2f: /* Westmere */
-                factor = 13333;
-                break;
-
-            default:
-                factor = 10000;
-                break;
-            }
+        case 0x0e: /* Core */
+        case 0x0f: case 0x16: case 0x17: case 0x1d: /* Core2 */
+            /*
+             * PLATFORM_INFO, while not documented for these, appears to exist
+             * in at least some cases, but what it holds doesn't match the
+             * scheme used by newer CPUs.  At a guess, the min and max fields
+             * look to be reversed, while the scaling factor is encoded in
+             * FSB_FREQ.
+             */
+            if ( min_ratio > max_ratio )
+                SWAP(min_ratio, max_ratio);
+            if ( rdmsr_safe(MSR_FSB_FREQ, msrval) ||
+                 (msrval &= 7) >= ARRAY_SIZE(core_factors) )
+                return;
+            factor = core_factors[msrval];
+            break;
+
+        case 0x1a: case 0x1e: case 0x1f: case 0x2e: /* Nehalem */
+        case 0x25: case 0x2c: case 0x2f: /* Westmere */
+            factor = 13333;
+            break;
+
+        default:
+            factor = 10000;
+            break;
         }
         break;
 
--
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