[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging-4.13] x86/spec-ctrl: Cease using thunk=lfence on AMD
commit 7b9814b250a5a28277bd0866d341a5cfc0f4c1ac Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> AuthorDate: Mon Mar 7 16:35:52 2022 +0000 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Tue Mar 8 17:13:41 2022 +0000 x86/spec-ctrl: Cease using thunk=lfence on AMD AMD have updated their Spectre v2 guidance, and lfence/jmp is no longer considered safe. AMD are recommending using retpoline everywhere. Update the default heuristics to never select THUNK_LFENCE. This is part of XSA-398 / CVE-2021-26401. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> (cherry picked from commit 8d03080d2a339840d3a59e0932a94f804e45110d) --- docs/misc/xen-command-line.pandoc | 6 +++--- xen/arch/x86/spec_ctrl.c | 10 ++-------- 2 files changed, 5 insertions(+), 11 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index cf9dea62db..eead69ada2 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2077,9 +2077,9 @@ to use. If Xen was compiled with INDIRECT_THUNK support, `bti-thunk=` can be used to select which of the thunks gets patched into the `__x86_indirect_thunk_%reg` -locations. The default thunk is `retpoline` (generally preferred for Intel -hardware), with the alternatives being `jmp` (a `jmp *%reg` gadget, minimal -overhead), and `lfence` (an `lfence; jmp *%reg` gadget, preferred for AMD). +locations. The default thunk is `retpoline` (generally preferred), with the +alternatives being `jmp` (a `jmp *%reg` gadget, minimal overhead), and +`lfence` (an `lfence; jmp *%reg` gadget). On hardware supporting IBRS (Indirect Branch Restricted Speculation), the `ibrs=` option can be used to force or prevent Xen using the feature itself. diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 1cfd02d7d7..7447d4a8e5 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -908,16 +908,10 @@ void __init init_speculation_mitigations(void) if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) ) { /* - * AMD's recommended mitigation is to set lfence as being dispatch - * serialising, and to use IND_THUNK_LFENCE. - */ - if ( cpu_has_lfence_dispatch ) - thunk = THUNK_LFENCE; - /* - * On Intel hardware, we'd like to use retpoline in preference to + * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - else if ( retpoline_safe(caps) ) + if ( retpoline_safe(caps) ) thunk = THUNK_RETPOLINE; else if ( boot_cpu_has(X86_FEATURE_IBRSB) ) ibrs = true; -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.13
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