[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging-4.12] xen/arm: Add ECBHB and CLEARBHB ID fields
commit 2e519fd8c1e3e7ae5370a6638615d2a52169db28 Author: Bertrand Marquis <bertrand.marquis@xxxxxxx> AuthorDate: Wed Feb 23 09:42:18 2022 +0000 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Tue Mar 8 17:12:50 2022 +0000 xen/arm: Add ECBHB and CLEARBHB ID fields Introduce ID coprocessor register ID_AA64ISAR2_EL1. Add definitions in cpufeature and sysregs of ECBHB field in mmfr1 and CLEARBHB in isar2 ID coprocessor registers. This is part of XSA-398 / CVE-2022-23960. Signed-off-by: Bertrand Marquis <bertrand.marquis@xxxxxxx> Acked-by: Julien Grall <julien@xxxxxxx> (cherry picked from commit 4b68d12d98b8790d8002fcc2c25a9d713374a4d7) --- xen/arch/arm/cpufeature.c | 1 + xen/include/asm-arm/arm64/sysregs.h | 4 ++++ xen/include/asm-arm/cpufeature.h | 20 +++++++++++++++++--- 3 files changed, 22 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/cpufeature.c b/xen/arch/arm/cpufeature.c index 44126dbf07..13dac7ccaf 100644 --- a/xen/arch/arm/cpufeature.c +++ b/xen/arch/arm/cpufeature.c @@ -117,6 +117,7 @@ void identify_cpu(struct cpuinfo_arm *c) c->isa64.bits[0] = READ_SYSREG64(ID_AA64ISAR0_EL1); c->isa64.bits[1] = READ_SYSREG64(ID_AA64ISAR1_EL1); + c->isa64.bits[2] = READ_SYSREG64(ID_AA64ISAR2_EL1); #endif c->pfr32.bits[0] = READ_SYSREG32(ID_PFR0_EL1); diff --git a/xen/include/asm-arm/arm64/sysregs.h b/xen/include/asm-arm/arm64/sysregs.h index 08585a969e..5f1e9b998f 100644 --- a/xen/include/asm-arm/arm64/sysregs.h +++ b/xen/include/asm-arm/arm64/sysregs.h @@ -57,6 +57,10 @@ #define ICH_AP1R2_EL2 __AP1Rx_EL2(2) #define ICH_AP1R3_EL2 __AP1Rx_EL2(3) +#ifndef ID_AA64ISAR2_EL1 +#define ID_AA64ISAR2_EL1 S3_0_C0_C6_2 +#endif + /* Access to system registers */ #define READ_SYSREG32(name) ({ \ diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index 60e677d842..c748fc17fe 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -182,12 +182,26 @@ struct cpuinfo_arm { unsigned long lo:4; unsigned long pan:4; unsigned long __res1:8; - unsigned long __res2:32; + unsigned long __res2:28; + unsigned long ecbhb:4; }; } mm64; - struct { - uint64_t bits[2]; + union { + uint64_t bits[3]; + struct { + /* ISAR0 */ + unsigned long __res0:64; + + /* ISAR1 */ + unsigned long __res1:64; + + /* ISAR2 */ + unsigned long __res3:28; + unsigned long clearbhb:4; + + unsigned long __res4:32; + }; } isa64; #endif -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.12
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |