[xen staging] ns16550: add support for Intel LPSS UART

[patchbot@xxxxxxx]

commit 46d5cec7e03d01a480ffdb6a50a576c7fe503df0
Author:     Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>
AuthorDate: Tue Mar 15 12:09:01 2022 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Tue Mar 15 12:09:01 2022 +0100

    ns16550: add support for Intel LPSS UART
    
    This adds support for serial console as found in a laptop with TGL-LP
    (StarBook MkV). Since the device is on the bus 0, it needs to be enabled
    via "com1=...,amt", not just "...,pci".
    
    Device specification is in Intel docs 631119-007 and 631120-001.
    
    Signed-off-by: Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/drivers/char/ns16550.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
index e5b4a90855..fb75cee4a1 100644
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -91,6 +91,7 @@ struct ns16550_config {
         param_exar_xr17v352,
         param_exar_xr17v354,
         param_exar_xr17v358,
+        param_intel_lpss,
     } param;
 };
 
@@ -822,6 +823,16 @@ static const struct ns16550_config_param __initconst 
uart_param[] = {
         .mmio = 1,
         .max_ports = 8,
     },
+    [param_intel_lpss] = {
+        .uart_offset = 0x000,
+        .reg_shift = 2,
+        .reg_width = 1,
+        .fifo_size = 64,
+        .lsr_mask = UART_LSR_THRE,
+        .bar0 = 1,
+        .mmio = 1,
+        .max_ports = 1,
+    },
 };
 
 static const struct ns16550_config __initconst uart_config[] =
@@ -1066,6 +1077,12 @@ static const struct ns16550_config __initconst 
uart_config[] =
         .dev_id = 0x0358,
         .param = param_exar_xr17v358
     },
+    /* Intel Corp. TGL-LP LPSS PCI */
+    {
+        .vendor_id = PCI_VENDOR_ID_INTEL,
+        .dev_id = 0xa0c7,
+        .param = param_intel_lpss
+    },
 };
 
 static int __init
--
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