[xen staging-4.13] x86/spec-ctrl: Enumeration for MMIO Stale Data controls

[patchbot@xxxxxxx]

commit 413b08328a57b931a689be278cc72b428c378d3b
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Thu Jun 16 13:40:24 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill 
Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
    (cherry picked from commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec)
---
 xen/arch/x86/spec_ctrl.c        | 9 +++++++--
 xen/include/asm-x86/msr-index.h | 5 +++++
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 38e1f10982..fd36927ba1 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -318,7 +318,7 @@ static void __init print_details(enum ind_thunk thunk, 
uint64_t caps)
     printk("Speculative mitigation facilities:\n");
 
     /* Hardware features which pertain to speculative mitigations. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBRS/IBPB" : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_STIBP)) ? " STIBP"     : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_L1D_FLUSH)) ? " L1D_FLUSH" : "",
@@ -333,7 +333,12 @@ static void __init print_details(enum ind_thunk thunk, 
uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                ? " SSB_NO"    : "",
            (caps & ARCH_CAPS_MDS_NO)                ? " MDS_NO"    : "",
            (caps & ARCH_CAPS_TSX_CTRL)              ? " TSX_CTRL"  : "",
-           (caps & ARCH_CAPS_TAA_NO)                ? " TAA_NO"    : "");
+           (caps & ARCH_CAPS_TAA_NO)                ? " TAA_NO"    : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)          ? " SBDR_SSDP_NO" : "",
+           (caps & ARCH_CAPS_FBSDP_NO)              ? " FBSDP_NO"  : "",
+           (caps & ARCH_CAPS_PSDP_NO)               ? " PSDP_NO"   : "",
+           (caps & ARCH_CAPS_FB_CLEAR)              ? " FB_CLEAR"  : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)         ? " FB_CLEAR_CTRL" : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) 
)
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index ba9e90af21..2a80660d84 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -55,6 +55,11 @@
 #define ARCH_CAPS_IF_PSCHANGE_MC_NO    (_AC(1, ULL) << 6)
 #define ARCH_CAPS_TSX_CTRL             (_AC(1, ULL) << 7)
 #define ARCH_CAPS_TAA_NO               (_AC(1, ULL) << 8)
+#define ARCH_CAPS_SBDR_SSDP_NO         (_AC(1, ULL) << 13)
+#define ARCH_CAPS_FBSDP_NO             (_AC(1, ULL) << 14)
+#define ARCH_CAPS_PSDP_NO              (_AC(1, ULL) << 15)
+#define ARCH_CAPS_FB_CLEAR             (_AC(1, ULL) << 17)
+#define ARCH_CAPS_FB_CLEAR_CTRL                (_AC(1, ULL) << 18)
 
 #define MSR_FLUSH_CMD                  0x0000010b
 #define FLUSH_CMD_L1D                  (_AC(1, ULL) << 0)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13