[xen staging-4.15] x86/spec-ctrl: Enumeration for PBRSB_NO

[patchbot@xxxxxxx]

commit fba0c22e79922085c46527eb1391123aadfb24d1
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Mon Aug 15 15:42:31 2022 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Mon Aug 15 15:42:31 2022 +0200

    x86/spec-ctrl: Enumeration for PBRSB_NO
    
    The PBRSB_NO bit indicates that the CPU is not vulnerable to the 
Post-Barrier
    RSB speculative vulnerability.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
    master commit: b874e47eb13feb75be3ee7b5dc4ae9c97d80d774
    master date: 2022-08-11 16:19:50 +0100
---
 xen/arch/x86/msr.c              | 2 +-
 xen/arch/x86/spec_ctrl.c        | 3 ++-
 xen/include/asm-x86/msr-index.h | 1 +
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index aa9face9aa..9bced8d36c 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -148,7 +148,7 @@ int init_domain_msr_policy(struct domain *d)
              ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO 
|
              ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO |
              ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA |
-             ARCH_CAPS_BHI_NO);
+             ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO);
     }
 
     d->arch.msr = mp;
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index ac73806eac..3ff602bd02 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -419,7 +419,7 @@ static void __init print_details(enum ind_thunk thunk, 
uint64_t caps)
      * Hardware read-only information, stating immunity to certain issues, or
      * suggestions of which mitigation to use.
      */
-    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (caps & ARCH_CAPS_RDCL_NO)                        ? " RDCL_NO"      
  : "",
            (caps & ARCH_CAPS_IBRS_ALL)                       ? " IBRS_ALL"     
  : "",
            (caps & ARCH_CAPS_RSBA)                           ? " RSBA"         
  : "",
@@ -431,6 +431,7 @@ static void __init print_details(enum ind_thunk thunk, 
uint64_t caps)
            (caps & ARCH_CAPS_SBDR_SSDP_NO)                   ? " SBDR_SSDP_NO" 
  : "",
            (caps & ARCH_CAPS_FBSDP_NO)                       ? " FBSDP_NO"     
  : "",
            (caps & ARCH_CAPS_PSDP_NO)                        ? " PSDP_NO"      
  : "",
+           (caps & ARCH_CAPS_PBRSB_NO)                       ? " PBRSB_NO"     
  : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS))    ? " IBRS_ALWAYS"  
  : "",
            (e8b  & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS))   ? " STIBP_ALWAYS" 
  : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_FAST))      ? " IBRS_FAST"    
  : "",
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 49ca1f1845..5a830f76a8 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -66,6 +66,7 @@
 #define  ARCH_CAPS_FB_CLEAR_CTRL            (_AC(1, ULL) << 18)
 #define  ARCH_CAPS_RRSBA                    (_AC(1, ULL) << 19)
 #define  ARCH_CAPS_BHI_NO                   (_AC(1, ULL) << 20)
+#define  ARCH_CAPS_PBRSB_NO                 (_AC(1, ULL) << 24)
 
 #define MSR_FLUSH_CMD                       0x0000010b
 #define  FLUSH_CMD_L1D                      (_AC(1, ULL) <<  0)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15