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[xen staging] Temporarily revert "amd/msr: implement VIRT_SPEC_CTRL for HVM guests on top of SPEC_CTRL"

Date: Fri, 19 Aug 2022 19:33:24 +0000

Delivery-date: Fri, 19 Aug 2022 19:33:25 +0000

List-id: "Change log for Mercurial \(receive only\)" <xen-changelog.lists.xenproject.org>

commit 8c5d17f5a48ea2cd4cac27b6ae414c0946d4eda8 Author: George Dunlap <george.dunlap@xxxxxxxxxx> AuthorDate: Fri Aug 19 20:18:46 2022 +0100 Commit: George Dunlap <george.dunlap@xxxxxxxxxx> CommitDate: Fri Aug 19 20:22:10 2022 +0100 Temporarily revert "amd/msr: implement VIRT_SPEC_CTRL for HVM guests on top of SPEC_CTRL" A person tagged in commit ebaaa72ee080c8774b1df5783220d4811159c327 claims the tag is in accurate; revert this commit so that we can re-commit it again with the tag corrected. Signed-off-by: George Dunlap <george.dunlap@xxxxxxxxxx> --- xen/arch/x86/cpuid.c | 7 ------- xen/arch/x86/hvm/hvm.c | 1 - xen/arch/x86/include/asm/msr.h | 4 ---- xen/arch/x86/msr.c | 18 ------------------ xen/arch/x86/spec_ctrl.c | 3 +-- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 6 files changed, 2 insertions(+), 33 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 979dcf8164..7e0b395698 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -550,13 +550,6 @@ static void __init calculate_hvm_max_policy(void) __clear_bit(X86_FEATURE_IBRSB, hvm_featureset); __clear_bit(X86_FEATURE_IBRS, hvm_featureset); } - else if ( boot_cpu_has(X86_FEATURE_AMD_SSBD) ) - /* - * If SPEC_CTRL.SSBD is available VIRT_SPEC_CTRL.SSBD can be exposed - * and implemented using the former. Expose in the max policy only as - * the preference is for guests to use SPEC_CTRL.SSBD if available. - */ - __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); /* * With VT-x, some features are only supported by Xen if dedicated diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 6b5d585ed4..0dd320a6a9 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -1337,7 +1337,6 @@ static const uint32_t msrs_to_send[] = { MSR_INTEL_MISC_FEATURES_ENABLES, MSR_IA32_BNDCFGS, MSR_IA32_XSS, - MSR_VIRT_SPEC_CTRL, MSR_AMD64_DR0_ADDRESS_MASK, MSR_AMD64_DR1_ADDRESS_MASK, MSR_AMD64_DR2_ADDRESS_MASK, diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index ab6fbb5051..ce4fe51afe 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -291,7 +291,6 @@ struct vcpu_msrs { /* * 0x00000048 - MSR_SPEC_CTRL - * 0xc001011f - MSR_VIRT_SPEC_CTRL (if X86_FEATURE_AMD_SSBD) * * For PV guests, this holds the guest kernel value. It is accessed on * every entry/exit path. @@ -307,9 +306,6 @@ struct vcpu_msrs * We must clear/restore Xen's value before/after VMRUN to avoid unduly * influencing the guest. In order to support "behind the guest's back" * protections, we load this value (commonly 0) before VMRUN. - * - * Once of such "behind the guest's back" usages is setting SPEC_CTRL.SSBD - * if the guest sets VIRT_SPEC_CTRL.SSBD. */ struct { uint32_t raw; diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 2ae1fcfd5f..d2e2dc2a6b 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -389,13 +389,6 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) ? K8_HWCR_TSC_FREQ_SEL : 0; break; - case MSR_VIRT_SPEC_CTRL: - if ( !cp->extd.virt_ssbd ) - goto gp_fault; - - *val = msrs->spec_ctrl.raw & SPEC_CTRL_SSBD; - break; - case MSR_AMD64_DE_CFG: if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) goto gp_fault; @@ -681,17 +674,6 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) wrmsr_tsc_aux(val); break; - case MSR_VIRT_SPEC_CTRL: - if ( !cp->extd.virt_ssbd ) - goto gp_fault; - - /* Only supports SSBD bit, the rest are ignored. */ - if ( val & SPEC_CTRL_SSBD ) - msrs->spec_ctrl.raw |= SPEC_CTRL_SSBD; - else - msrs->spec_ctrl.raw &= ~SPEC_CTRL_SSBD; - break; - case MSR_AMD64_DE_CFG: /* * OpenBSD 6.7 will panic if writing to DE_CFG triggers a #GP: diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 96e7f0983a..160cc68086 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -509,13 +509,12 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps) * mitigation support for guests. */ #ifdef CONFIG_HVM - printk(" Support for HVM VMs:%s%s%s%s%s%s%s\n", + printk(" Support for HVM VMs:%s%s%s%s%s%s\n", (boot_cpu_has(X86_FEATURE_SC_MSR_HVM) || boot_cpu_has(X86_FEATURE_SC_RSB_HVM) || boot_cpu_has(X86_FEATURE_IBPB_ENTRY_HVM) || opt_eager_fpu || opt_md_clear_hvm) ? "" : " None", boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_SPEC_CTRL" : "", - boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_VIRT_SPEC_CTRL" : "", boot_cpu_has(X86_FEATURE_SC_RSB_HVM) ? " RSB" : "", opt_eager_fpu ? " EAGER_FPU" : "", opt_md_clear_hvm ? " MD_CLEAR" : "", diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 42f48a8ae2..4b8925b7b8 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -265,7 +265,7 @@ XEN_CPUFEATURE(IBRS_SAME_MODE, 8*32+19) /*S IBRS provides same-mode protection XEN_CPUFEATURE(NO_LMSL, 8*32+20) /*S EFER.LMSLE no longer supported. */ XEN_CPUFEATURE(AMD_PPIN, 8*32+23) /* Protected Processor Inventory Number */ XEN_CPUFEATURE(AMD_SSBD, 8*32+24) /*S MSR_SPEC_CTRL.SSBD available */ -XEN_CPUFEATURE(VIRT_SSBD, 8*32+25) /*! MSR_VIRT_SPEC_CTRL.SSBD */ +XEN_CPUFEATURE(VIRT_SSBD, 8*32+25) /* MSR_VIRT_SPEC_CTRL.SSBD */ XEN_CPUFEATURE(SSB_NO, 8*32+26) /*A Hardware not vulnerable to SSB */ XEN_CPUFEATURE(PSFD, 8*32+28) /*S MSR_SPEC_CTRL.PSFD */ XEN_CPUFEATURE(BTC_NO, 8*32+29) /*A Hardware not vulnerable to Branch Type Confusion */ -- generated by git-patchbot for /home/xen/git/xen.git#staging

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