[xen staging] hvm/msr: load VIRT_SPEC_CTRL

[patchbot@xxxxxxx]

commit 0d251a1dd15f9c406de2d7d7fe018c4e6e454215
Author:     Roger Pau Monné <roger.pau@xxxxxxxxxx>
AuthorDate: Wed Nov 2 12:06:37 2022 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Wed Nov 2 12:06:37 2022 +0100

    hvm/msr: load VIRT_SPEC_CTRL
    
    Add MSR_VIRT_SPEC_CTRL to the list of MSRs handled by
    hvm_load_cpu_msrs(), or else it would be lost.
    
    Fixes: 8ffd5496f4 ('amd/msr: implement VIRT_SPEC_CTRL for HVM guests on top 
of SPEC_CTRL')
    Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
    Release-acked-by: Henry Wang <Henry.Wang@xxxxxxx>
---
 xen/arch/x86/hvm/hvm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 44b432ec5a..15a9b34c59 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -1498,6 +1498,7 @@ static int cf_check hvm_load_cpu_msrs(struct domain *d, 
hvm_domain_context_t *h)
         case MSR_INTEL_MISC_FEATURES_ENABLES:
         case MSR_IA32_BNDCFGS:
         case MSR_IA32_XSS:
+        case MSR_VIRT_SPEC_CTRL:
         case MSR_AMD64_DR0_ADDRESS_MASK:
         case MSR_AMD64_DR1_ADDRESS_MASK ... MSR_AMD64_DR3_ADDRESS_MASK:
             rc = guest_wrmsr(v, ctxt->msr[i].index, ctxt->msr[i].val);
--
generated by git-patchbot for /home/xen/git/xen.git#staging