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[xen stable-4.17] x86/time: prevent overflow with high frequency TSCs



commit a7a26da0b59da7233e6c6f63b180bab131398351
Author:     Neowutran <xen@xxxxxxxxxxxxx>
AuthorDate: Tue Dec 20 13:46:38 2022 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Tue Dec 20 13:46:38 2022 +0100

    x86/time: prevent overflow with high frequency TSCs
    
    Make sure tsc_khz is promoted to a 64-bit type before multiplying by
    1000 to avoid an 'overflow before widen' bug. Otherwise just above
    4.294GHz the value will overflow. Processors with clocks this high are
    now in production and require this to work correctly.
    
    Signed-off-by: Neowutran <xen@xxxxxxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
    master commit: ad15a0a8ca2515d8ac58edfc0bc1d3719219cb77
    master date: 2022-12-19 11:34:16 +0100
---
 xen/arch/x86/time.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c
index b01acd390d..d882b43cf0 100644
--- a/xen/arch/x86/time.c
+++ b/xen/arch/x86/time.c
@@ -2585,7 +2585,7 @@ int tsc_set_info(struct domain *d,
     case TSC_MODE_ALWAYS_EMULATE:
         d->arch.vtsc_offset = get_s_time() - elapsed_nsec;
         d->arch.tsc_khz = gtsc_khz ?: cpu_khz;
-        set_time_scale(&d->arch.vtsc_to_ns, d->arch.tsc_khz * 1000);
+        set_time_scale(&d->arch.vtsc_to_ns, d->arch.tsc_khz * 1000UL);
 
         /*
          * In default mode use native TSC if the host has safe TSC and
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17



 


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