[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] x86: Remove temporary {cpuid,msr}_policy defines
commit 994c1553a158ada9db5ab64c9178a0d23c0a42ce Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> AuthorDate: Wed Mar 29 13:07:03 2023 +0100 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Remove temporary {cpuid,msr}_policy defines With all code areas updated, drop the temporary defines and adjust all remaining users. No practical change. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Acked-by: Jan Beulich <jbeulich@xxxxxxxx> --- xen/arch/x86/cpu/mcheck/mce_intel.c | 2 +- xen/arch/x86/cpuid.c | 2 +- xen/arch/x86/domain.c | 2 +- xen/arch/x86/hvm/hvm.c | 4 ++-- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/arch/x86/hvm/vlapic.c | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 8 ++++---- xen/arch/x86/include/asm/msr.h | 2 +- xen/arch/x86/msr.c | 20 +++++++++----------- xen/arch/x86/pv/domain.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 4 ++-- xen/arch/x86/traps.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.c | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 4 ---- 14 files changed, 26 insertions(+), 32 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c index 301533722d..2f23f02923 100644 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -1008,7 +1008,7 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; unsigned int bank = msr - MSR_IA32_MC0_CTL2; switch ( msr ) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 3f20c342fd..f311372cdf 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -36,7 +36,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; *res = EMPTY_LEAF; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index b23e5014d1..91f57e3a3b 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -283,7 +283,7 @@ void update_guest_memory_policy(struct vcpu *v, void domain_cpu_policy_changed(struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; struct vcpu *v; if ( is_pv_domain(d) ) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 675c523d99..7020fdce99 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -924,7 +924,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, signed int cr0_pg) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; if ( value & ~EFER_KNOWN_MASK ) return "Unknown bits set"; @@ -961,7 +961,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, /* These bits in CR4 can be set by the guest. */ unsigned long hvm_cr4_guest_valid_bits(const struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; bool mce, vmxe, cet; /* Logic broken out simply to aid readability below. */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 02563e4b70..b8fe759db4 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -583,7 +583,7 @@ static void cf_check svm_cpuid_policy_changed(struct vcpu *v) { struct svm_vcpu *svm = &v->arch.hvm.svm; struct vmcb_struct *vmcb = svm->vmcb; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; u32 bitmap = vmcb_get_exception_intercepts(vmcb); if ( opt_hvm_fep || diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index dc93b5e930..f4f5ffc673 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1083,7 +1083,7 @@ static void set_x2apic_id(struct vlapic *vlapic) int guest_wrmsr_apic_base(struct vcpu *v, uint64_t value) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; struct vlapic *vlapic = vcpu_vlapic(v); if ( !has_vlapic(v->domain) ) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index e055885058..ee4c41628c 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -710,7 +710,7 @@ static void vmx_restore_host_msrs(void) static void vmx_save_guest_msrs(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; struct vcpu_msrs *msrs = v->arch.msrs; /* @@ -731,7 +731,7 @@ static void vmx_save_guest_msrs(struct vcpu *v) static void vmx_restore_guest_msrs(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; const struct vcpu_msrs *msrs = v->arch.msrs; write_gs_shadow(v->arch.hvm.vmx.shadow_gs); @@ -784,7 +784,7 @@ void vmx_update_exception_bitmap(struct vcpu *v) static void cf_check vmx_cpuid_policy_changed(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; int rc = 0; if ( opt_hvm_fep || @@ -3521,7 +3521,7 @@ static int cf_check vmx_msr_write_intercept( unsigned int msr, uint64_t msr_content) { struct vcpu *v = current; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x, msr_value=%#"PRIx64, msr, msr_content); diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index 458841733e..1d8ea9f26f 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -290,7 +290,7 @@ static inline void wrmsr_tsc_aux(uint32_t val) } } -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp); /* Container object for per-vCPU MSRs */ struct vcpu_msrs diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 802fc60baf..2e16818bf5 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -54,8 +54,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) { const struct vcpu *curr = current; const struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; const struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -139,13 +138,13 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) goto get_reg; case MSR_INTEL_PLATFORM_INFO: - *val = mp->platform_info.raw; + *val = cp->platform_info.raw; break; case MSR_ARCH_CAPABILITIES: if ( !cp->feat.arch_caps ) goto gp_fault; - *val = mp->arch_caps.raw; + *val = cp->arch_caps.raw; break; case MSR_INTEL_MISC_FEATURES_ENABLES: @@ -326,7 +325,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * separate CPUID features for this functionality, but only set will be * active. */ -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp) +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp) { bool ssbd = cp->feat.ssbd || cp->extd.amd_ssbd; bool psfd = cp->feat.intel_psfd || cp->extd.psfd; @@ -345,8 +344,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) { const struct vcpu *curr = current; struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -387,7 +385,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * for backwards compatiblity, the OS should write 0 to it before * trying to access the current microcode version. */ - if ( d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL || val != 0 ) + if ( cp->x86_vendor != X86_VENDOR_INTEL || val != 0 ) goto gp_fault; break; @@ -397,7 +395,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * to AMD CPUs as well (at least the architectural/CPUID part does). */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_AMD ) + cp->x86_vendor != X86_VENDOR_AMD ) goto gp_fault; break; @@ -409,7 +407,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * by any CPUID bit. */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL ) + cp->x86_vendor != X86_VENDOR_INTEL ) goto gp_fault; break; @@ -446,7 +444,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting; rsvd = ~0ull; - if ( mp->platform_info.cpuid_faulting ) + if ( cp->platform_info.cpuid_faulting ) rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING; if ( val & rsvd ) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 95492715d8..5c92812dc6 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -146,7 +146,7 @@ static void release_compat_l4(struct vcpu *v) unsigned long pv_fixup_guest_cr4(const struct vcpu *v, unsigned long cr4) { - const struct cpuid_policy *p = v->domain->arch.cpuid; + const struct cpu_policy *p = v->domain->arch.cpu_policy; /* Discard attempts to set guest controllable bits outside of the policy. */ cr4 &= ~((p->basic.tsc ? 0 : X86_CR4_TSD) | diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index ab52768271..04416f1979 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -885,7 +885,7 @@ static int cf_check read_msr( { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false, warn = false; uint64_t tmp; int ret; @@ -1034,7 +1034,7 @@ static int cf_check write_msr( { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false; int ret; diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index c36e3f855b..e4f8b158e1 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1036,7 +1036,7 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; uint32_t base = is_viridian_domain(d) ? 0x40000100 : 0x40000000; uint32_t idx = leaf - base; unsigned int limit = is_viridian_domain(d) ? p->hv2_limit : p->hv_limit; diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 5a0ec5900a..c69f7c65f5 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -848,7 +848,7 @@ protmode_load_seg( struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) { - const struct cpuid_policy *cp = ctxt->cpuid; + const struct cpu_policy *cp = ctxt->cpu_policy; enum x86_segment sel_seg = (sel & 4) ? x86_seg_ldtr : x86_seg_gdtr; struct { uint32_t a, b; } desc, desc_hi = {}; uint8_t dpl, rpl; diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index cf7de0f29c..bfa4250604 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -375,10 +375,6 @@ struct cpu_policy uint8_t x86_vendor; }; -/* Temporary */ -#define cpuid_policy cpu_policy -#define msr_policy cpu_policy - struct cpu_policy_errors { uint32_t leaf, subleaf; -- generated by git-patchbot for /home/xen/git/xen.git#master
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