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[xen master] xen/changelog: Add SVE and "dom0" options to the changelog for Arm



commit cb8b18d49ad804108ead8667179794b0ead66f2a
Author:     Luca Fancellu <luca.fancellu@xxxxxxx>
AuthorDate: Wed May 31 08:24:13 2023 +0100
Commit:     Julien Grall <jgrall@xxxxxxxxxx>
CommitDate: Wed Jun 7 11:22:51 2023 +0100

    xen/changelog: Add SVE and "dom0" options to the changelog for Arm
    
    Arm now can use the "dom0=" Xen command line option and the support
    for guests running SVE instructions is added, put entries in the
    changelog.
    
    Mention the "Tech Preview" status and add an entry in SUPPORT.md
    
    Signed-off-by: Luca Fancellu <luca.fancellu@xxxxxxx>
    Acked-by: Henry Wang <Henry.Wang@xxxxxxx> # CHANGELOG
    Reviewed-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>
---
 CHANGELOG.md | 4 ++++
 SUPPORT.md   | 6 ++++++
 2 files changed, 10 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index ceedaf333a..7d7e0590f8 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -11,6 +11,8 @@ The format is based on [Keep a 
Changelog](https://keepachangelog.com/en/1.0.0/)
    cap toolstack provided values.
  - Ignore VCPUOP_set_singleshot_timer's VCPU_SSHOTTMR_future flag. The only
    known user doesn't use it properly, leading to in-guest breakage.
+ - The "dom0" option is now supported on Arm and "sve=" sub-option can be used
+   to enable dom0 guest to use SVE/SVE2 instructions.
 
 ### Added
  - On x86, support for features new in Intel Sapphire Rapids CPUs:
@@ -21,6 +23,8 @@ The format is based on [Keep a 
Changelog](https://keepachangelog.com/en/1.0.0/)
      wide impact of a guest misusing atomic instructions.
  - xl/libxl can customize SMBIOS strings for HVM guests.
  - Add support for AVX512-FP16 on x86.
+ - On Arm, Xen supports guests running SVE/SVE2 instructions. (Tech Preview)
+
 
 ## 
[4.17.0](https://xenbits.xen.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.17.0) 
- 2022-12-12
 
diff --git a/SUPPORT.md b/SUPPORT.md
index 6dbed9d5d0..c0aeb1f3f5 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -99,6 +99,12 @@ Extension to the GICv3 interrupt controller to support MSI.
 
     Status: Experimental
 
+### ARM Scalable Vector Extension (SVE/SVE2)
+
+Arm64 domains can use Scalable Vector Extension (SVE/SVE2).
+
+    Status: Tech Preview
+
 ## Guest Type
 
 ### x86/PV
--
generated by git-patchbot for /home/xen/git/xen.git#master



 


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