[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] xen/arm: debug-pl011: Use correct accessors
commit 655d0798d29b7ac490444b2daf9bffa16d41e822 Author: Michal Orzel <michal.orzel@xxxxxxx> AuthorDate: Wed Jun 7 11:27:24 2023 +0200 Commit: Stefano Stabellini <stefano.stabellini@xxxxxxx> CommitDate: Mon Jun 19 12:19:52 2023 -0700 xen/arm: debug-pl011: Use correct accessors Although most PL011 UARTs can cope with 32-bit accesses, some of the old legacy ones might not. PL011 registers are 8/16-bit wide and this shall be perceived as the normal behavior. Modify early printk pl011 code for arm32/arm64 to use the correct accessors depending on the register size (refer ARM DDI 0183G, Table 3.1). Signed-off-by: Michal Orzel <michal.orzel@xxxxxxx> Tested-by: Henry Wang <Henry.Wang@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> --- xen/arch/arm/arm32/debug-pl011.inc | 12 ++++++------ xen/arch/arm/arm64/debug-pl011.inc | 6 +++--- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/arm32/debug-pl011.inc b/xen/arch/arm/arm32/debug-pl011.inc index c527f1d442..9fe0c25038 100644 --- a/xen/arch/arm/arm32/debug-pl011.inc +++ b/xen/arch/arm/arm32/debug-pl011.inc @@ -26,13 +26,13 @@ */ .macro early_uart_init rb, rc, rd mov \rc, #(7372800 / CONFIG_EARLY_UART_PL011_BAUD_RATE % 16) - str \rc, [\rb, #FBRD] /* -> UARTFBRD (Baud divisor fraction) */ + strb \rc, [\rb, #FBRD] /* -> UARTFBRD (Baud divisor fraction) */ mov \rc, #(7372800 / CONFIG_EARLY_UART_PL011_BAUD_RATE / 16) - str \rc, [\rb, #IBRD] /* -> UARTIBRD (Baud divisor integer) */ + strh \rc, [\rb, #IBRD] /* -> UARTIBRD (Baud divisor integer) */ mov \rc, #WLEN_8 /* 8n1 */ - str \rc, [\rb, #LCR_H] /* -> UARTLCR_H (Line control) */ + strb \rc, [\rb, #LCR_H] /* -> UARTLCR_H (Line control) */ ldr \rc, =(RXE | TXE | UARTEN) /* RXE | TXE | UARTEN */ - str \rc, [\rb, #CR] /* -> UARTCR (Control Register) */ + strh \rc, [\rb, #CR] /* -> UARTCR (Control Register) */ .endm /* @@ -42,7 +42,7 @@ */ .macro early_uart_ready rb, rc 1: - ldr \rc, [\rb, #FR] /* <- UARTFR (Flag register) */ + ldrh \rc, [\rb, #FR] /* <- UARTFR (Flag register) */ tst \rc, #BUSY /* Check BUSY bit */ bne 1b /* Wait for the UART to be ready */ .endm @@ -53,7 +53,7 @@ * rt: register which contains the character to transmit */ .macro early_uart_transmit rb, rt - str \rt, [\rb, #DR] /* -> UARTDR (Data Register) */ + strb \rt, [\rb, #DR] /* -> UARTDR (Data Register) */ .endm /* diff --git a/xen/arch/arm/arm64/debug-pl011.inc b/xen/arch/arm/arm64/debug-pl011.inc index 6d60e78c8b..df713eff49 100644 --- a/xen/arch/arm/arm64/debug-pl011.inc +++ b/xen/arch/arm/arm64/debug-pl011.inc @@ -25,13 +25,13 @@ */ .macro early_uart_init xb, c mov x\c, #(7372800 / CONFIG_EARLY_UART_PL011_BAUD_RATE % 16) - strh w\c, [\xb, #FBRD] /* -> UARTFBRD (Baud divisor fraction) */ + strb w\c, [\xb, #FBRD] /* -> UARTFBRD (Baud divisor fraction) */ mov x\c, #(7372800 / CONFIG_EARLY_UART_PL011_BAUD_RATE / 16) strh w\c, [\xb, #IBRD] /* -> UARTIBRD (Baud divisor integer) */ mov x\c, #WLEN_8 /* 8n1 */ - str w\c, [\xb, #LCR_H] /* -> UARTLCR_H (Line control) */ + strb w\c, [\xb, #LCR_H] /* -> UARTLCR_H (Line control) */ ldr x\c, =(RXE | TXE | UARTEN) - str w\c, [\xb, #CR] /* -> UARTCR (Control Register) */ + strh w\c, [\xb, #CR] /* -> UARTCR (Control Register) */ .endm /* -- generated by git-patchbot for /home/xen/git/xen.git#master
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