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[xen master] xen/arm64: head: Introduce a helper to flush local TLBs



commit 15601eed05922c0df5b59d5fb3f9ec6d85e57a00
Author:     Michal Orzel <michal.orzel@xxxxxxx>
AuthorDate: Tue Aug 8 13:07:39 2023 +0200
Commit:     Julien Grall <jgrall@xxxxxxxxxx>
CommitDate: Wed Aug 9 12:00:12 2023 +0100

    xen/arm64: head: Introduce a helper to flush local TLBs
    
    Instead of repeating the same sequence of instructions to flush the TLBs
    in various places, introduce a macro flush_xen_tlb_local and make use of
    it. This is similar to what was done for arm32 by the commit:
    dea9dddeceec8a1d68da24b14d5b2396effe555f
    
    This is also making the flush sequence in enable_mmu more clear and
    consistent.
    
    Signed-off-by: Michal Orzel <michal.orzel@xxxxxxx>
    Reviewed-by: Luca Fancellu <luca.fancellu@xxxxxxx>
    Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>
    Reviewed-by: Julien Grall <jgrall@xxxxxxxxxx>
---
 xen/arch/arm/arm64/head.S | 31 ++++++++++++++++---------------
 1 file changed, 16 insertions(+), 15 deletions(-)

diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
index 31cdb54d74..8bca9afa27 100644
--- a/xen/arch/arm/arm64/head.S
+++ b/xen/arch/arm/arm64/head.S
@@ -136,6 +136,18 @@
         add \xb, \xb, x20
 .endm
 
+/*
+ * Flush local TLBs
+ *
+ * See asm/arm64/flushtlb.h for the explanation of the sequence.
+ */
+.macro flush_xen_tlb_local
+        dsb   nshst
+        tlbi  alle2
+        dsb   nsh
+        isb
+.endm
+
         .section .text.header, "ax", %progbits
         /*.aarch64*/
 
@@ -721,8 +733,7 @@ enable_mmu:
          * The state of the TLBs is unknown before turning on the MMU.
          * Flush them to avoid stale one.
          */
-        tlbi  alle2                  /* Flush hypervisor TLBs */
-        dsb   nsh
+        flush_xen_tlb_local
 
         /* Write Xen's PT's paddr into TTBR0_EL2 */
         msr   TTBR0_EL2, x4
@@ -786,11 +797,7 @@ remove_identity_mapping:
         str   xzr, [x0, x1, lsl #3]
 
 identity_mapping_removed:
-        /* See asm/arm64/flushtlb.h for the explanation of the sequence. */
-        dsb   nshst
-        tlbi  alle2
-        dsb   nsh
-        isb
+        flush_xen_tlb_local
 
         ret
 ENDPROC(remove_identity_mapping)
@@ -872,14 +879,8 @@ ENTRY(switch_ttbr_id)
         msr    SCTLR_EL2, x1
         isb
 
-        /*
-         * 3) Flush the TLBs.
-         * See asm/arm64/flushtlb.h for the explanation of the sequence.
-         */
-        dsb   nshst
-        tlbi  alle2
-        dsb   nsh
-        isb
+        /* 3) Flush the TLBs */
+        flush_xen_tlb_local
 
         /* 4) Update the TTBR */
         msr   TTBR0_EL2, x0
--
generated by git-patchbot for /home/xen/git/xen.git#master



 


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