[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] xen/arm: smmuv3: Add missing U for shifted constant
commit 05a01367610316ccb49e7ab6af79f5d3cc12a986 Author: Michal Orzel <michal.orzel@xxxxxxx> AuthorDate: Wed Sep 6 14:54:22 2023 +0200 Commit: Jan Beulich <jbeulich@xxxxxxxx> CommitDate: Wed Sep 6 14:54:22 2023 +0200 xen/arm: smmuv3: Add missing U for shifted constant When running with SMMUv3 and UBSAN enabled, the following is printed: (XEN) UBSAN: Undefined behaviour in drivers/passthrough/arm/smmu-v3.c:297:12 (XEN) left shift of 1 by 31 places cannot be represented in type 'int' This refers to shift in Q_OVERFLOW_FLAG that is missing 'U' suffix. While there, also fix the same in GBPA_UPDATE. This should address MISRA Rule 7.2: A "u" or "U" suffix shall be applied to all integer constants that are represented in an unsigned type Signed-off-by: Michal Orzel <michal.orzel@xxxxxxx> Reviewed-by: Bertrand Marquis <bertrand.marquis@xxxxxxx> --- xen/drivers/passthrough/arm/smmu-v3.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu-v3.h b/xen/drivers/passthrough/arm/smmu-v3.h index b381ad3738..05f6b1fb7e 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.h +++ b/xen/drivers/passthrough/arm/smmu-v3.h @@ -87,7 +87,7 @@ #define CR2_E2H (1 << 0) #define ARM_SMMU_GBPA 0x44 -#define GBPA_UPDATE (1 << 31) +#define GBPA_UPDATE (1U << 31) #define GBPA_ABORT (1 << 20) #define ARM_SMMU_IRQ_CTRL 0x50 @@ -159,7 +159,7 @@ #define Q_IDX(llq, p) ((p) & ((1 << (llq)->max_n_shift) - 1)) #define Q_WRP(llq, p) ((p) & (1 << (llq)->max_n_shift)) -#define Q_OVERFLOW_FLAG (1 << 31) +#define Q_OVERFLOW_FLAG (1U << 31) #define Q_OVF(p) ((p) & Q_OVERFLOW_FLAG) #define Q_ENT(q, p) ((q)->base + \ Q_IDX(&((q)->llq), p) * \ -- generated by git-patchbot for /home/xen/git/xen.git#master
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