[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] xen/arm: gic-v3: address violations of MISRA C:2012 Rule 16.3
commit 7d18ab2b9bc1f56469702e95944524889ef3475a Author: Federico Serafini <federico.serafini@xxxxxxxxxxx> AuthorDate: Wed Dec 20 12:03:01 2023 +0100 Commit: Stefano Stabellini <stefano.stabellini@xxxxxxx> CommitDate: Wed Dec 20 10:19:15 2023 -0800 xen/arm: gic-v3: address violations of MISRA C:2012 Rule 16.3 Add the pseudo-keyword fallthrough to meet the requirements to deviate Rule 16.3 ("An unconditional `break' statement shall terminate every switch-clause"). No functional change. Signed-off-by: Federico Serafini <federico.serafini@xxxxxxxxxxx> Acked-by: Julien Grall <jgrall@xxxxxxxxxx> --- xen/arch/arm/gic-v3.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 18289cd645..bf0e5c1b75 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -65,34 +65,49 @@ static inline void gicv3_save_lrs(struct vcpu *v) { case 16: v->arch.gic.v3.lr[15] = READ_SYSREG_LR(15); + fallthrough; case 15: v->arch.gic.v3.lr[14] = READ_SYSREG_LR(14); + fallthrough; case 14: v->arch.gic.v3.lr[13] = READ_SYSREG_LR(13); + fallthrough; case 13: v->arch.gic.v3.lr[12] = READ_SYSREG_LR(12); + fallthrough; case 12: v->arch.gic.v3.lr[11] = READ_SYSREG_LR(11); + fallthrough; case 11: v->arch.gic.v3.lr[10] = READ_SYSREG_LR(10); + fallthrough; case 10: v->arch.gic.v3.lr[9] = READ_SYSREG_LR(9); + fallthrough; case 9: v->arch.gic.v3.lr[8] = READ_SYSREG_LR(8); + fallthrough; case 8: v->arch.gic.v3.lr[7] = READ_SYSREG_LR(7); + fallthrough; case 7: v->arch.gic.v3.lr[6] = READ_SYSREG_LR(6); + fallthrough; case 6: v->arch.gic.v3.lr[5] = READ_SYSREG_LR(5); + fallthrough; case 5: v->arch.gic.v3.lr[4] = READ_SYSREG_LR(4); + fallthrough; case 4: v->arch.gic.v3.lr[3] = READ_SYSREG_LR(3); + fallthrough; case 3: v->arch.gic.v3.lr[2] = READ_SYSREG_LR(2); + fallthrough; case 2: v->arch.gic.v3.lr[1] = READ_SYSREG_LR(1); + fallthrough; case 1: v->arch.gic.v3.lr[0] = READ_SYSREG_LR(0); break; @@ -112,34 +127,49 @@ static inline void gicv3_restore_lrs(const struct vcpu *v) { case 16: WRITE_SYSREG_LR(v->arch.gic.v3.lr[15], 15); + fallthrough; case 15: WRITE_SYSREG_LR(v->arch.gic.v3.lr[14], 14); + fallthrough; case 14: WRITE_SYSREG_LR(v->arch.gic.v3.lr[13], 13); + fallthrough; case 13: WRITE_SYSREG_LR(v->arch.gic.v3.lr[12], 12); + fallthrough; case 12: WRITE_SYSREG_LR(v->arch.gic.v3.lr[11], 11); + fallthrough; case 11: WRITE_SYSREG_LR(v->arch.gic.v3.lr[10], 10); + fallthrough; case 10: WRITE_SYSREG_LR(v->arch.gic.v3.lr[9], 9); + fallthrough; case 9: WRITE_SYSREG_LR(v->arch.gic.v3.lr[8], 8); + fallthrough; case 8: WRITE_SYSREG_LR(v->arch.gic.v3.lr[7], 7); + fallthrough; case 7: WRITE_SYSREG_LR(v->arch.gic.v3.lr[6], 6); + fallthrough; case 6: WRITE_SYSREG_LR(v->arch.gic.v3.lr[5], 5); + fallthrough; case 5: WRITE_SYSREG_LR(v->arch.gic.v3.lr[4], 4); + fallthrough; case 4: WRITE_SYSREG_LR(v->arch.gic.v3.lr[3], 3); + fallthrough; case 3: WRITE_SYSREG_LR(v->arch.gic.v3.lr[2], 2); + fallthrough; case 2: WRITE_SYSREG_LR(v->arch.gic.v3.lr[1], 1); + fallthrough; case 1: WRITE_SYSREG_LR(v->arch.gic.v3.lr[0], 0); break; -- generated by git-patchbot for /home/xen/git/xen.git#master
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