[xen staging] x86/mm: address violations of MISRA C Rule 20.7

[patchbot@xxxxxxx]

commit 4a75f2ffc034544e383652e1485e13709e389f85
Author:     Nicola Vetrini <nicola.vetrini@xxxxxxxxxxx>
AuthorDate: Thu Apr 25 09:51:31 2024 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Thu Apr 25 09:51:31 2024 +0200

    x86/mm: address violations of MISRA C Rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses". Therefore, some
    macro definitions should gain additional parentheses to ensure that all
    current and future users will be safe with respect to expansions that
    can possibly alter the semantics of the passed-in macro parameter.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@xxxxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/mm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 9141912ae5..87529db7d1 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -162,7 +162,7 @@ static uint32_t base_disallow_mask;
 #define L4_DISALLOW_MASK (base_disallow_mask)
 
 #define l1_disallow_mask(d)                                     \
-    ((d != dom_io) &&                                           \
+    (((d) != dom_io) &&                                         \
      (rangeset_is_empty((d)->iomem_caps) &&                     \
       rangeset_is_empty((d)->arch.ioport_caps) &&               \
       !has_arch_pdevs(d) &&                                     \
--
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