[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] x86/entry: shrink insn size for some of our EFLAGS manipulation
commit a505890d81efe78659bb3d9d17c141003ff46dc4 Author: Jan Beulich <jbeulich@xxxxxxxx> AuthorDate: Fri Apr 26 12:43:01 2024 +0200 Commit: Jan Beulich <jbeulich@xxxxxxxx> CommitDate: Fri Apr 26 12:43:01 2024 +0200 x86/entry: shrink insn size for some of our EFLAGS manipulation Much like was recently done for setting entry vector, and along the lines of what we already had in handle_exception_saved, avoid 32-bit immediates where 8-bit ones do. Reduces .text.entry size by 16 bytes in my non-CET reference build, while in my CET reference build section size doesn't change (there and in .text only padding space increases). Inspired by other long->byte conversion work. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- xen/arch/x86/x86_64/entry.S | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index a4615e1ccb..df015589ce 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -226,7 +226,7 @@ LABEL_LOCAL(.Lrestore_rcx_iret_exit_to_guest) /* No special register assumptions. */ iret_exit_to_guest: andl $~(X86_EFLAGS_IOPL | X86_EFLAGS_VM), EFRAME_eflags(%rsp) - orl $X86_EFLAGS_IF, EFRAME_eflags(%rsp) + orb $X86_EFLAGS_IF >> 8, EFRAME_eflags + 1(%rsp) SPEC_CTRL_COND_VERW /* Req: %rsp=eframe Clob: efl */ @@ -355,7 +355,7 @@ LABEL(sysenter_eflags_saved, 0) /* WARNING! `ret`, `call *`, `jmp *` not safe before this point. */ /* PUSHF above has saved EFLAGS.IF clear (the caller had it set). */ - orl $X86_EFLAGS_IF, UREGS_eflags(%rsp) + orb $X86_EFLAGS_IF >> 8, UREGS_eflags + 1(%rsp) mov STACK_CPUINFO_FIELD(xen_cr3)(%r14), %rcx test %rcx, %rcx jz .Lsyse_cr3_okay @@ -370,11 +370,11 @@ LABEL(sysenter_eflags_saved, 0) cmpb $0,VCPU_sysenter_disables_events(%rbx) movq VCPU_sysenter_addr(%rbx),%rax setne %cl - testl $X86_EFLAGS_NT,UREGS_eflags(%rsp) + testb $X86_EFLAGS_NT >> 8, UREGS_eflags + 1(%rsp) leaq VCPU_trap_bounce(%rbx),%rdx UNLIKELY_START(nz, sysenter_nt_set) pushfq - andl $~X86_EFLAGS_NT,(%rsp) + andb $~(X86_EFLAGS_NT >> 8), 1(%rsp) popfq UNLIKELY_END(sysenter_nt_set) testq %rax,%rax -- generated by git-patchbot for /home/xen/git/xen.git#master
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