[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[xen staging] x86: allow to suppress port-alias probing



commit c09960a1a28ef7ef65d7b090646b605f62fccb77
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Thu May 16 10:02:34 2024 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Thu May 16 10:02:34 2024 +0200

    x86: allow to suppress port-alias probing
    
    By default there's already no use for this when we run in shim mode.
    Plus there may also be a need to suppress the probing in case of issues
    with it. Before introducing further port alias probing, introduce a
    command line option allowing to bypass it, default it to on when in shim
    mode, and gate RTC/CMOS port alias probing on it.
    
    Requested-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Jason Andryuk <jason.andryuk@xxxxxxx>
---
 docs/misc/xen-command-line.pandoc | 11 +++++++++++
 xen/arch/x86/include/asm/setup.h  |  1 +
 xen/arch/x86/setup.c              |  6 ++++++
 xen/arch/x86/time.c               |  3 ++-
 4 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/docs/misc/xen-command-line.pandoc 
b/docs/misc/xen-command-line.pandoc
index e760f3266e..1dea7431fa 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2004,6 +2004,17 @@ INVPCID is supported and not disabled via 
`invpcid=false`.
 This is a mask of C-states which are to be used preferably.  This option is
 applicable only on hardware were certain C-states are exclusive of one another.
 
+### probe-port-aliases (x86)
+> `= <boolean>`
+
+> Default: `true` outside of shim mode, `false` in shim mode
+
+Certain devices accessible by I/O ports may be accessible also through "alias"
+ports (originally a result of incomplete address decoding).  When such devices
+are solely under Xen's control, Xen disallows even Dom0 access to the "primary"
+ports.  When alias probing is active and aliases are detected, "alias" ports
+would then be treated similar to the "primary" ones.
+
 ### psr (Intel)
 > `= List of ( cmt:<boolean> | rmid_max:<integer> | cat:<boolean> | 
 > cos_max:<integer> | cdp:<boolean> )`
 
diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/setup.h
index 1849e60cd6..e48b9d01e9 100644
--- a/xen/arch/x86/include/asm/setup.h
+++ b/xen/arch/x86/include/asm/setup.h
@@ -49,6 +49,7 @@ extern unsigned long highmem_start;
 #endif
 
 extern int8_t opt_smt;
+extern int8_t opt_probe_port_aliases;
 
 #ifdef CONFIG_SHADOW_PAGING
 extern bool opt_dom0_shadow;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index f84e1cd79c..b50c9c84af 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -76,6 +76,9 @@ static bool __initdata opt_invpcid = true;
 boolean_param("invpcid", opt_invpcid);
 bool __read_mostly use_invpcid;
 
+int8_t __initdata opt_probe_port_aliases = -1;
+boolean_param("probe-port-aliases", opt_probe_port_aliases);
+
 /* Only used in asm code and within this source file */
 unsigned long asmlinkage __read_mostly cr4_pv32_mask;
 
@@ -1860,6 +1863,9 @@ void asmlinkage __init noreturn __start_xen(unsigned long 
mbi_p)
     /* Low mappings were only needed for some BIOS table parsing. */
     zap_low_mappings();
 
+    if ( opt_probe_port_aliases < 0 )
+        opt_probe_port_aliases = !pv_shim;
+
     init_apic_mappings();
 
     normalise_cpu_order();
diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c
index 78ea095e3e..9655971269 100644
--- a/xen/arch/x86/time.c
+++ b/xen/arch/x86/time.c
@@ -1252,7 +1252,8 @@ static int __init cf_check probe_cmos_alias(void)
 {
     unsigned int offs;
 
-    if ( acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC )
+    if ( (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) ||
+         !opt_probe_port_aliases )
         return 0;
 
     for ( offs = 2; offs < 8; offs <<= 1 )
--
generated by git-patchbot for /home/xen/git/xen.git#staging



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.