[xen staging] ARM/vgic: Correct the expression for lr_all_full()

[patchbot@xxxxxxx]

commit bad717f845782b4aa9699544428d4d5f3073cd24
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Aug 30 15:20:17 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Tue Sep 3 15:51:44 2024 +0100

    ARM/vgic: Correct the expression for lr_all_full()
    
    The current expression hits UB with 31 LRs (shifting into the sign bit), and
    malfunctions with 32 LRs (shifting beyond the range of int).  Swapping 1 for
    1ULL fixes some of these, but still malfunctions at 64 LRs which is the
    architectural limit.
    
    Instead, shift -1ULL right in order to create the mask.
    
    Fixes: 596f885a3202 ("xen/arm: set GICH_HCR_UIE if all the LRs are in use")
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Michal Orzel <michal.orzel@xxxxxxx>
---
 xen/arch/arm/gic-vgic.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c
index 9aa245a36d..3f14aab2ef 100644
--- a/xen/arch/arm/gic-vgic.c
+++ b/xen/arch/arm/gic-vgic.c
@@ -16,7 +16,8 @@
 #include <asm/gic.h>
 #include <asm/vgic.h>
 
-#define lr_all_full() (this_cpu(lr_mask) == ((1 << gic_get_nr_lrs()) - 1))
+#define lr_all_full()                                           \
+    (this_cpu(lr_mask) == (-1ULL >> (64 - gic_get_nr_lrs())))
 
 #undef GIC_DEBUG
 
--
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