[xen staging] x86emul: avoid double memory read for RORX

[patchbot@xxxxxxx]

commit 939a9e800c4156677c10c6cf08fde071e9b86eaf
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Thu Nov 14 13:03:18 2024 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Thu Nov 14 13:03:18 2024 +0100

    x86emul: avoid double memory read for RORX
    
    Originally only twobyte_table[0x3a] determined what part of generic
    operand fetching (near the top of x86_emulate()) comes into play. When
    ext0f3a_table[] was added, ->desc was updated to properly describe the
    ModR/M byte's function. With that generic source operand fetching came
    into play for RORX, rendering the explicit fetching in the respective
    case block redundant (and wrong at the very least when MMIO with side
    effects is accessed).
    
    While there also make a purely cosmetic / documentary adjustment to
    ext0f3a_table[]: RORX really is a 2-operand insn, MOV-like in that it
    only writes its destination register.
    
    Fixes: 9f7f5f6bc95b ("x86emul: add tables for 0f38 and 0f3a extension 
space")
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
 xen/arch/x86/x86_emulate/decode.c      | 2 +-
 xen/arch/x86/x86_emulate/x86_emulate.c | 5 -----
 2 files changed, 1 insertion(+), 6 deletions(-)

diff --git a/xen/arch/x86/x86_emulate/decode.c 
b/xen/arch/x86/x86_emulate/decode.c
index 0a0751f2ed..7ce97c4726 100644
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -521,7 +521,7 @@ static const struct ext0f3a_table {
     [0xce ... 0xcf] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
     [0xde] = { .simd_size = simd_other },
     [0xdf] = { .simd_size = simd_packed_int, .two_op = 1 },
-    [0xf0] = {},
+    [0xf0] = { .two_op = 1 /* Mov */ },
 };
 
 static const opcode_desc_t xop_table[] = {
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c 
b/xen/arch/x86/x86_emulate/x86_emulate.c
index c91d048d26..0600df789c 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -7699,11 +7699,6 @@ x86_emulate(
     case X86EMUL_OPC_VEX_F2(0x0f3a, 0xf0): /* rorx imm,r/m,r */
         vcpu_must_have(bmi2);
         generate_exception_if(vex.l || vex.reg != 0xf, X86_EXC_UD);
-        if ( ea.type == OP_REG )
-            src.val = *ea.reg;
-        else if ( (rc = read_ulong(ea.mem.seg, ea.mem.off, &src.val, op_bytes,
-                                   ctxt, ops)) != X86EMUL_OKAY )
-            goto done;
         if ( mode_64bit() && vex.w )
             asm ( "rorq %b1,%0" : "=g" (dst.val) : "c" (imm1), "0" (src.val) );
         else
--
generated by git-patchbot for /home/xen/git/xen.git#staging