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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging-4.20] x86/mwait-idle: add Emerald Rapids Xeon support
commit 53939e22c2de4eb62a7f6e3be1f1a20276673d8e
Author: Artem Bityutskiy <artem.bityutskiy@xxxxxxxxxxxxxxx>
AuthorDate: Tue Jul 22 09:50:49 2025 +0200
Commit: Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Tue Jul 22 09:50:49 2025 +0200
x86/mwait-idle: add Emerald Rapids Xeon support
Emerald Rapids (EMR) is the next Intel Xeon processor after Sapphire
Rapids (SPR).
EMR C-states are the same as SPR C-states, and we expect that EMR
C-state characteristics (latency and target residency) will be the
same as in SPR. Therefore, add EMR support by using SPR C-states table.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@xxxxxxxxxxxxxxx>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx>
Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
74528edfbc66
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
master commit: a689b121993a48646d154e0b6c43d868b805f9a5
master date: 2025-07-09 11:00:44 +0200
---
xen/arch/x86/cpu/mwait-idle.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index 27351dc3f1..386f7f3dc2 100644
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -1188,6 +1188,7 @@ static const struct x86_cpu_id intel_idle_ids[]
__initconstrel = {
ICPU(ALDERLAKE_L, adl_l),
ICPU(ATOM_GRACEMONT, gmt),
ICPU(SAPPHIRERAPIDS_X, spr),
+ ICPU(EMERALDRAPIDS_X, spr),
ICPU(ATOM_GOLDMONT, bxt),
ICPU(ATOM_GOLDMONT_PLUS, bxt),
ICPU(ATOM_GOLDMONT_D, dnv),
@@ -1421,6 +1422,7 @@ static void __init mwait_idle_state_table_update(void)
skx_idle_state_table_update();
break;
case INTEL_FAM6_SAPPHIRERAPIDS_X:
+ case INTEL_FAM6_EMERALDRAPIDS_X:
spr_idle_state_table_update();
break;
case INTEL_FAM6_ALDERLAKE:
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.20
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