[xen staging] x86/ucode: Update vendor/family/model logic

[patchbot@xxxxxxx]

commit 385e2d929c9d9709b43cfb38582957ec66b2ce26
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Jul 18 17:06:17 2025 +0100
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Tue Jul 29 17:25:54 2025 +0100

    x86/ucode: Update vendor/family/model logic
    
    Switch to the new fields.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/cpu/microcode/amd.c  | 10 +++++-----
 xen/arch/x86/cpu/microcode/core.c |  4 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index 8b09231c6c..a5729229a4 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -122,7 +122,7 @@ static bool check_digest(const struct container_microcode 
*mc)
      * microcode updates.  Mitigate by checking the digest of the patch
      * against a list of known provenance.
      */
-    if ( boot_cpu_data.x86 < 0x17 ||
+    if ( boot_cpu_data.family < 0x17 ||
          !opt_digest_check )
         return true;
 
@@ -174,7 +174,7 @@ static bool verify_patch_size(uint32_t patch_size)
 #define F19H_MPB_MAX_SIZE 5568
 #define F1AH_MPB_MAX_SIZE 15296
 
-    switch ( boot_cpu_data.x86 )
+    switch ( boot_cpu_data.family )
     {
     case 0x14:
         max_size = F14H_MPB_MAX_SIZE;
@@ -222,7 +222,7 @@ static bool check_final_patch_levels(const struct 
cpu_signature *sig)
     };
     unsigned int i;
 
-    if ( boot_cpu_data.x86 != 0x10 )
+    if ( boot_cpu_data.family != 0x10 )
         return false;
 
     for ( i = 0; i < ARRAY_SIZE(final_levels); i++ )
@@ -516,14 +516,14 @@ static const struct microcode_ops __initconst_cf_clobber 
amd_ucode_ops = {
 
 void __init ucode_probe_amd(struct microcode_ops *ops)
 {
-    if ( !opt_digest_check && boot_cpu_data.x86 >= 0x17 )
+    if ( !opt_digest_check && boot_cpu_data.family >= 0x17 )
     {
         printk(XENLOG_WARNING
                "Microcode patch additional digest checks disabled");
         add_taint(TAINT_CPU_OUT_OF_SPEC);
     }
 
-    if ( boot_cpu_data.x86 < 0x10 )
+    if ( boot_cpu_data.family < 0x10 )
         return;
 
     *ops = amd_ucode_ops;
diff --git a/xen/arch/x86/cpu/microcode/core.c 
b/xen/arch/x86/cpu/microcode/core.c
index 816e9bfe40..1b093bc98a 100644
--- a/xen/arch/x86/cpu/microcode/core.c
+++ b/xen/arch/x86/cpu/microcode/core.c
@@ -198,7 +198,7 @@ static struct microcode_patch *parse_blob(const char *buf, 
size_t len)
 /* Returns true if ucode should be loaded on a given cpu */
 static bool is_cpu_primary(unsigned int cpu)
 {
-    if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+    if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
         /* Load ucode on every logical thread/core */
         return true;
 
@@ -876,7 +876,7 @@ int __init early_microcode_init(struct boot_info *bi)
 {
     const struct cpuinfo_x86 *c = &boot_cpu_data;
 
-    switch ( c->x86_vendor )
+    switch ( c->vendor )
     {
     case X86_VENDOR_AMD:
         ucode_probe_amd(&ucode_ops);
--
generated by git-patchbot for /home/xen/git/xen.git#staging