[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] x86/msr: Rename MSR_INTERRUPT_SSP_TABLE to MSR_ISST
commit bd92e2151c19a01a237d7e447dc77210c2242840 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> AuthorDate: Tue Dec 24 14:03:49 2024 +0000 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Wed Aug 13 13:13:08 2025 +0100 x86/msr: Rename MSR_INTERRUPT_SSP_TABLE to MSR_ISST AMD call this whole structure the ISST, which is a better association with IST than the long form (which becomes ambiguous when abbreviated). No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Acked-by: Jan Beulich <jbeulich@xxxxxxxx> --- xen/arch/x86/cpu/common.c | 2 +- xen/arch/x86/include/asm/msr-index.h | 2 +- xen/arch/x86/msr.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 97bdda1d4a..f6ec5c9df5 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -933,7 +933,7 @@ void load_system_tables(void) wrss(df_ssp, _p(df_ssp)); } - wrmsrl(MSR_INTERRUPT_SSP_TABLE, (unsigned long)ist_ssp); + wrmsrl(MSR_ISST, (unsigned long)ist_ssp); } BUILD_BUG_ON(sizeof(*tss) <= 0x67); /* Mandated by the architecture. */ diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 2e7e2aff9a..428d993ee8 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -157,7 +157,7 @@ #define MSR_PL1_SSP 0x000006a5 #define MSR_PL2_SSP 0x000006a6 #define MSR_PL3_SSP 0x000006a7 -#define MSR_INTERRUPT_SSP_TABLE 0x000006a8 +#define MSR_ISST 0x000006a8 #define MSR_PKRS 0x000006e1 diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 2cd46b6c8a..1bf117cbd8 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -138,7 +138,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) case MSR_RTIT_OUTPUT_BASE ... MSR_RTIT_ADDR_B(7): case MSR_U_CET: case MSR_S_CET: - case MSR_PL0_SSP ... MSR_INTERRUPT_SSP_TABLE: + case MSR_PL0_SSP ... MSR_ISST: case MSR_AMD64_LWP_CFG: case MSR_AMD64_LWP_CBADDR: case MSR_PPIN_CTL: @@ -442,7 +442,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) case MSR_RTIT_OUTPUT_BASE ... MSR_RTIT_ADDR_B(7): case MSR_U_CET: case MSR_S_CET: - case MSR_PL0_SSP ... MSR_INTERRUPT_SSP_TABLE: + case MSR_PL0_SSP ... MSR_ISST: case MSR_AMD64_LWP_CFG: case MSR_AMD64_LWP_CBADDR: case MSR_PPIN_CTL: -- generated by git-patchbot for /home/xen/git/xen.git#master
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