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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] x86/boot: Adjust CR4 handling around percpu_early_traps_init()
commit 8218f8cf452bfa701d18d61d8a8e0f3a61f511de
Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Mon May 26 15:32:44 2025 +0100
Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Thu Aug 28 23:12:32 2025 +0100
x86/boot: Adjust CR4 handling around percpu_early_traps_init()
percpu_early_traps_init() will shortly be setting CR4.FRED. This requires
that cpu_info->cr4 is already set up, and that the enablement of CET doesn't
truncate X86_CR4_FRED back out because of using 32bit logic.
For __high_start(), defer re-loading XEN_MINIMAL_CR4 until after %rsp is set
up and we can store the result in the cr4 field too.
For s3_resume(), explicitly re-load XEN_MINIMAL_CR4. Later when loading all
features, use the mmu_cr4_features variable which is how the rest of Xen
performs this operation.
No functional change, yet.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
---
xen/arch/x86/acpi/wakeup_prot.S | 18 ++++++++++++++----
xen/arch/x86/boot/x86_64.S | 15 ++++++++++-----
2 files changed, 24 insertions(+), 9 deletions(-)
diff --git a/xen/arch/x86/acpi/wakeup_prot.S b/xen/arch/x86/acpi/wakeup_prot.S
index cc40fddc38..0f02ea7b4b 100644
--- a/xen/arch/x86/acpi/wakeup_prot.S
+++ b/xen/arch/x86/acpi/wakeup_prot.S
@@ -63,6 +63,14 @@ LABEL(s3_resume)
pushq %rax
lretq
1:
+
+ GET_STACK_END(15)
+
+ /* Enable minimal CR4 features, sync cached state. */
+ mov $XEN_MINIMAL_CR4, %eax
+ mov %rax, STACK_CPUINFO_FIELD(cr4)(%r15)
+ mov %rax, %cr4
+
/* Set up early exceptions and CET before entering C properly. */
call percpu_early_traps_init
@@ -77,7 +85,9 @@ LABEL(s3_resume)
wrmsr
/* Enable CR4.CET. */
- mov $XEN_MINIMAL_CR4 | X86_CR4_CET, %ecx
+ mov $X86_CR4_CET, %ecx
+ or STACK_CPUINFO_FIELD(cr4)(%r15), %rcx
+ mov %rcx, STACK_CPUINFO_FIELD(cr4)(%r15)
mov %rcx, %cr4
/* WARNING! call/ret now fatal (iff SHSTK) until SETSSBSY loads SSP */
@@ -120,9 +130,9 @@ LABEL(s3_resume)
.L_cet_done:
#endif /* CONFIG_XEN_SHSTK || CONFIG_XEN_IBT */
- /* Restore CR4 from the cpuinfo block. */
- GET_STACK_END(bx)
- mov STACK_CPUINFO_FIELD(cr4)(%rbx), %rax
+ /* Load all CR4 settings. */
+ mov mmu_cr4_features(%rip), %rax
+ mov %rax, STACK_CPUINFO_FIELD(cr4)(%r15)
mov %rax, %cr4
call mtrr_bp_restore
diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S
index d0e7449a14..3a5ad27644 100644
--- a/xen/arch/x86/boot/x86_64.S
+++ b/xen/arch/x86/boot/x86_64.S
@@ -11,16 +11,19 @@ ENTRY(__high_start)
mov %ecx,%gs
mov %ecx,%ss
- /* Enable minimal CR4 features. */
- mov $XEN_MINIMAL_CR4,%rcx
- mov %rcx,%cr4
-
mov stack_start(%rip),%rsp
/* Reset EFLAGS (subsumes CLI and CLD). */
pushq $0
popf
+ GET_STACK_END(15)
+
+ /* Enable minimal CR4 features, sync cached state. */
+ mov $XEN_MINIMAL_CR4, %eax
+ mov %rax, STACK_CPUINFO_FIELD(cr4)(%r15)
+ mov %rax, %cr4
+
/* Reload code selector. */
pushq $__HYPERVISOR_CS
leaq 1f(%rip),%rax
@@ -45,7 +48,9 @@ ENTRY(__high_start)
wrmsr
/* Enable CR4.CET. */
- mov $XEN_MINIMAL_CR4 | X86_CR4_CET, %ecx
+ mov $X86_CR4_CET, %ecx
+ or STACK_CPUINFO_FIELD(cr4)(%r15), %rcx
+ mov %rcx, STACK_CPUINFO_FIELD(cr4)(%r15)
mov %rcx, %cr4
/* WARNING! call/ret now fatal (iff SHSTK) until SETSSBSY loads SSP */
--
generated by git-patchbot for /home/xen/git/xen.git#master
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