[xen staging] xen/riscv: add support for local guest TLB flush using HFENCE.VVMA

[patchbot@xxxxxxx]

commit 8173a23dd6e2d2451686f538d04119d497f2831e
Author:     Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
AuthorDate: Thu Feb 12 11:32:53 2026 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Thu Feb 12 11:33:46 2026 +0100

    xen/riscv: add support for local guest TLB flush using HFENCE.VVMA
    
    Introduce flush_tlb_guest_local() to perform a local TLB flush of the 
guest's
    address space for the current hart. This leverages the RISC-V HFENCE.VVMA
    instruction, which is used to invalidate translations in the VS-stage of
    address translation.
    
    As for RISC-V binutils >= 2.39 is choosen, we can use hfence.vvma mnemonics
    instead of defining hfence.vvma using .insn.
    
    Although it would be possible to use sbi_remote_hfence_vvma() for this 
purpose,
    it is unnecessary in this context since the flush is required only on the
    local hart. Using the SBI call would introduce additional overhead without
    benefit, resulting in unnecessary performance loss.
    
    Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/riscv/include/asm/flushtlb.h  |  7 +++++++
 xen/arch/riscv/include/asm/insn-defs.h | 10 ++++++++++
 2 files changed, 17 insertions(+)

diff --git a/xen/arch/riscv/include/asm/flushtlb.h 
b/xen/arch/riscv/include/asm/flushtlb.h
index 4f64f97570..b0112d416d 100644
--- a/xen/arch/riscv/include/asm/flushtlb.h
+++ b/xen/arch/riscv/include/asm/flushtlb.h
@@ -5,6 +5,7 @@
 #include <xen/bug.h>
 #include <xen/cpumask.h>
 
+#include <asm/insn-defs.h>
 #include <asm/sbi.h>
 
 struct page_info;
@@ -14,6 +15,12 @@ static inline void local_hfence_gvma_all(void)
     asm volatile ( "hfence.gvma zero, zero" ::: "memory" );
 }
 
+/* Flush VS-stage TLB for current hart. */
+static inline void flush_tlb_guest_local(void)
+{
+    HFENCE_VVMA(0, 0);
+}
+
 /* Flush TLB of local processor for address va. */
 static inline void flush_tlb_one_local(vaddr_t va)
 {
diff --git a/xen/arch/riscv/include/asm/insn-defs.h 
b/xen/arch/riscv/include/asm/insn-defs.h
new file mode 100644
index 0000000000..61aaa202fd
--- /dev/null
+++ b/xen/arch/riscv/include/asm/insn-defs.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef ASM_RISCV_INSN_DEFS_H
+#define ASM_RISCV_INSN_DEFS_H
+
+#define HFENCE_VVMA(vaddr, asid) \
+    asm volatile ( "hfence.vvma %z0, %z1" \
+                  :: "rJ" (vaddr), "rJ" (asid) : "memory" )
+
+#endif /* ASM_RISCV_INSN_DEFS_H */
--
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