[xen staging] x86/fpu: Initialise FTW in xstate_alloc_save_area()

[patchbot@xxxxxxx]

commit 639de2aafa437fd50abc16a46c8a8dd0d0e9e6a7
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Mar 27 17:16:36 2026 +0000
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Mon Mar 30 15:48:13 2026 +0100

    x86/fpu: Initialise FTW in xstate_alloc_save_area()
    
    Right now, xstate_alloc_save_area() leaves both XSTATE_BV and FTW clear.  
This
    causes a difference in behaviour between FXRSTOR and XRSTOR.
    
    Switch to using using XSTATE's idea of initial configuration which will 
behave
    the same even on pre-XSAVE hardware.  Expand the comment to explain why.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/xstate.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index e990abc9d1..defe9b3f0c 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -550,11 +550,22 @@ int xstate_alloc_save_area(struct vcpu *v)
         return -ENOMEM;
 
     /*
-     * Set the memory image to default values, but don't force the context
-     * to be loaded from memory (i.e. keep save_area->xsave_hdr.xstate_bv
-     * clear).
+     * We're creating a vCPU, so conceptually we should be choosing the
+     * architectural #RESET values.
+     *
+     * However for historical reasons of configuring the external
+     * co-processor, FCW's #RESET state is different to what F(N)INIT and
+     * XSTATE consider the "initial configuration".
+     *
+     * Guests won't care about the difference; all software tends to executes
+     * FNINIT very early during setup.
+     *
+     * Use XSTATE's idea of initial configuration.  This allows XSTATE_BV to
+     * remain clear and for CPUs to use the INIT optimisation where
+     * applicable.
      */
     save_area->fpu_sse.fcw = FCW_DEFAULT;
+    save_area->fpu_sse.ftw = FXSAVE_FTW_RESET;
     save_area->fpu_sse.mxcsr = MXCSR_DEFAULT;
 
     v->arch.xsave_area = save_area;
--
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