[xen staging] arm/gicv3: Detect normal NC ITS command queues

[patchbot@xxxxxxx]

commit 98bea5e531ba76f346556b79f84236db064aef9f
Author:     Mykola Kvach <mykola_kvach@xxxxxxxx>
AuthorDate: Fri May 15 12:40:31 2026 +0300
Commit:     Stefano Stabellini <stefano.stabellini@xxxxxxx>
CommitDate: Tue May 19 22:30:00 2026 -0500

    arm/gicv3: Detect normal NC ITS command queues
    
    GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding.
    Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner
    Non-cacheable) describe non-cacheable accesses to the command queue.
    
    its_map_cbaser() only checked whether the shifted field was zero,
    so an ITS that reports Normal Inner Non-cacheable would not set
    HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with
    the unshifted enum value, matching the handling of ITS BASER tables
    and GICR_PROPBASER.
    
    Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer")
    Signed-off-by: Mykola Kvach <mykola_kvach@xxxxxxxx>
    Reviewed-by: Luca Fancellu <luca.fancellu@xxxxxxx>
    Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>
---
 xen/arch/arm/gic-v3-its.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c
index 9005ce8ce5..7560d46c6d 100644
--- a/xen/arch/arm/gic-v3-its.c
+++ b/xen/arch/arm/gic-v3-its.c
@@ -424,7 +424,8 @@ static void *its_map_cbaser(struct host_its *its)
      * If the command queue memory is mapped as uncached, we need to flush
      * it on every access.
      */
-    if ( !(reg & GITS_BASER_INNER_CACHEABILITY_MASK) )
+    if ( MASK_EXTR(reg, GITS_BASER_INNER_CACHEABILITY_MASK) <=
+         GIC_BASER_CACHE_nC )
     {
         its->flags |= HOST_ITS_FLUSH_CMD_QUEUE;
         printk(XENLOG_WARNING "using non-cacheable ITS command queue\n");
--
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