[xen staging] xen/arm: mask debug exceptions in initial AArch64 guest state

[patchbot@xxxxxxx]

commit ad8663a75aa8db4255d6690bfc210d559edc9f5b
Author:     Mykola Kvach <mykola_kvach@xxxxxxxx>
AuthorDate: Fri Jun 19 20:37:38 2026 +0200
Commit:     Michal Orzel <michal.orzel@xxxxxxx>
CommitDate: Mon Aug 3 11:48:59 2026 +0200

    xen/arm: mask debug exceptions in initial AArch64 guest state
    
    PSR_GUEST64_INIT currently masks SError, IRQ and FIQ, but leaves debug
    exceptions unmasked. Both the AArch64 Linux boot protocol and PSCI entry
    requirements expect PSTATE.DAIF to be masked.
    
    Add PSR_DBG_MASK to PSR_GUEST64_INIT. This fixes the initial AArch64 guest
    entry state as well as virtual PSCI CPU_ON and SYSTEM_SUSPEND resume entry.
    
    Signed-off-by: Mykola Kvach <mykola_kvach@xxxxxxxx>
    Reviewed-by: Julien Grall <julien@xxxxxxx>
---
 xen/include/public/arch-arm.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h
index 7d6f87e8b2..00de30b896 100644
--- a/xen/include/public/arch-arm.h
+++ b/xen/include/public/arch-arm.h
@@ -420,7 +420,8 @@ typedef uint64_t xen_callback_t;
  * zImage kernels on aarch32.
  */
 #define PSR_GUEST32_INIT 
(PSR_Z|PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC)
-#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
+#define PSR_GUEST64_INIT \
+    (PSR_DBG_MASK|PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
 
 #define SCTLR_GUEST_INIT    xen_mk_ullong(0x00c50078)
 
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