# HG changeset patch
# User root@xxxxxxxxxxxxxxxx
# Date 1172469513 21600
# Node ID 85fdc37398266e338a7d5debb41db0afffeb71a2
# Parent  e7b2a282c9e70fbadd38ccc7cc7d1fcb6a32b886
fix PDPE entry in P2M table under 32bit PAE hypervisor

diff -r e7b2a282c9e7 -r 85fdc3739826 xen/arch/x86/mm/p2m.c
--- a/xen/arch/x86/mm/p2m.c	Mon Feb 26 17:20:36 2007 +0000
+++ b/xen/arch/x86/mm/p2m.c	Sun Feb 25 23:58:33 2007 -0600
@@ -145,6 +145,10 @@ p2m_next_level(struct domain *d, mfn_t *
             paging_write_p2m_entry(d, gfn, p2m_entry, new_entry, 4);
             break;
         case PGT_l2_page_table:
+#if CONFIG_PAGING_LEVELS == 3
+            /* for PAE mode, PDPE only has PCD/PWT/P bits available */
+            new_entry = l1e_from_pfn(mfn_x(page_to_mfn(pg)), _PAGE_PRESENT);
+#endif
             paging_write_p2m_entry(d, gfn, p2m_entry, new_entry, 3);
             break;
         case PGT_l1_page_table: