diff --git a/hw/piix4acpi.c b/hw/piix4acpi.c
index fb1e5c3..2098223 100644
--- a/hw/piix4acpi.c
+++ b/hw/piix4acpi.c
@@ -38,7 +38,7 @@
 #define PIIX4ACPI_LOG_INFO 1
 #define PIIX4ACPI_LOG_DEBUG 2
 #define PIIX4ACPI_LOGLEVEL PIIX4ACPI_LOG_INFO
-#define PIIX4ACPI_LOG(level, fmt, ...) do { if (level <= PIIX4ACPI_LOGLEVEL) qemu_log(fmt, ## __VA_ARGS__); } while (0)
+#define PIIX4ACPI_LOG(level, fmt, ...) do { fprintf(logfile, fmt, ## __VA_ARGS__); } while (0)
 
 #ifdef CONFIG_PASSTHROUGH
 #include <pci/header.h>
@@ -553,7 +553,7 @@ static uint32_t gpe_cpus_readb(void *opaque, uint32_t addr)
 {
     uint32_t val = 0;
     GPEState *g = opaque;
-
+    fprintf(logfile, "%s: %x val: %x\n", __func__, addr, g->cpus_sts[addr - PROC_BASE]);
     switch (addr) {
         case PROC_BASE ... PROC_BASE+31:
             val = g->cpus_sts[addr - PROC_BASE];
@@ -820,7 +820,20 @@ void qemu_cpu_add_remove(int cpu, int state)
         fprintf(stderr, "vcpu out of range, should be [0~%d]\n", vcpus - 1);
         return;
     }
+    fprintf(logfile, "vcpu %d/%d, gpe0_sts[0]: %x\n",
+            cpu, vcpus, gpe_state.gpe0_en[0]);
 
+    {
+        int i;
+        for (i = 0; i < vcpus; i++ ) {
+            fprintf(logfile, "VCPU%d %x %s", i, gpe_state.cpus_sts[i/8] & (1 << (i%8)),
+                    (( i % 8) == 0) ? "\n" : "");
+        } /*
+        for (i = 0; i < ACPI_GPE0_BLK_LEN_V0 / 2; i++)
+            fprintf(logfile, "STS%d = %x\n", i, gpe_state.gpe0_sts[i]);
+        for (i = 0; i < ACPI_GPE0_BLK_LEN_V0 / 2; i++)
+            fprintf(logfile, "ENA%d = %x\n", i, gpe_state.gpe0_en[i]); */
+    }
     if (state) {
         if (!enable_processor(&gpe_state, cpu))
             return;
@@ -830,8 +843,8 @@ void qemu_cpu_add_remove(int cpu, int state)
     }
     fprintf(logfile, "%s vcpu %d\n", state ? "Add" : "Remove", cpu);
 
+    fprintf(logfile, "STS[0] = %x ENA[0] = %x\n", gpe_state.gpe0_sts[0], gpe_state.gpe0_en[0]);
     if (gpe_state.gpe0_en[0] & 4) {
-        qemu_set_irq(sci_irq, 1);
-        qemu_set_irq(sci_irq, 0);
+        qemu_irq_pulse(sci_irq);
     }
 }