--- ./src/core/stringextra.c.orig 2016-09-01 13:32:19.324143538 -0400 +++ ./src/core/stringextra.c 2016-09-01 13:35:00.948147391 -0400 @@ -186,7 +186,7 @@ { char *sbegin, *send; - sbegin = s ? s : ___strtok; + sbegin = s; if (!sbegin) { return NULL; } --- ./src/include/nic.h.orig 2016-09-01 13:34:13.587146262 -0400 +++ ./src/include/nic.h 2016-09-01 14:02:19.043186446 -0400 @@ -199,7 +199,8 @@ #undef DRIVER #define DRIVER(_name_text,_unused2,_unused3,_name,_probe,_disable) \ - static const char _name ## _text[] = _name_text; \ + static __attribute__ (( unused )) const char \ + _name ## _text[] = _name_text; \ static inline int \ _name ## _probe ( struct nic *nic, void *hwdev ) { \ return _probe ( nic, hwdev ); \ --- ./src/hci/mucurses/windows.c.orig 2016-09-01 13:34:04.834146053 -0400 +++ ./src/hci/mucurses/windows.c 2016-09-01 14:11:07.750199052 -0400 @@ -16,9 +16,6 @@ * @ret rc return status code */ int delwin ( WINDOW *win ) { - if ( win == NULL ) - return ERR; - /* I think we should blank the region covered by the window - ncurses doesn't do this, but they have a buffer, so they may just be deleting from an offscreen context whereas we @@ -49,8 +46,6 @@ WINDOW *derwin ( WINDOW *parent, int nlines, int ncols, int begin_y, int begin_x ) { WINDOW *child; - if ( parent == NULL ) - return NULL; if ( ( child = malloc( sizeof( WINDOW ) ) ) == NULL ) return NULL; if ( ( (unsigned)ncols > parent->width ) || @@ -73,8 +68,6 @@ */ WINDOW *dupwin ( WINDOW *orig ) { WINDOW *copy; - if ( orig == NULL ) - return NULL; if ( ( copy = malloc( sizeof( WINDOW ) ) ) == NULL ) return NULL; copy->scr = orig->scr; @@ -97,8 +90,6 @@ * @ret rc return status code */ int mvwin ( WINDOW *win, int y, int x ) { - if ( win == NULL ) - return ERR; if ( ( ( (unsigned)y + win->height ) > LINES ) || ( ( (unsigned)x + win->width ) > COLS ) ) return ERR; @@ -147,8 +138,6 @@ WINDOW *subwin ( WINDOW *parent, int nlines, int ncols, int begin_y, int begin_x ) { WINDOW *child; - if ( parent == NULL ) - return NULL; if ( ( child = malloc( sizeof( WINDOW ) ) ) == NULL ) return NULL; child = newwin( nlines, ncols, begin_y, begin_x ); --- ./src/drivers/net/igb/igb_phy.c.orig 2016-09-01 14:06:58.151193101 -0400 +++ ./src/drivers/net/igb/igb_phy.c 2016-09-01 14:07:12.503193443 -0400 @@ -91,18 +91,18 @@ if (!(phy->ops.read_reg)) goto out; - ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); - if (ret_val) - goto out; + ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); + if (ret_val) + goto out; - phy->id = (u32)(phy_id << 16); - usec_delay(20); - ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); - if (ret_val) - goto out; + phy->id = (u32)(phy_id << 16); + usec_delay(20); + ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); + if (ret_val) + goto out; - phy->id |= (u32)(phy_id & PHY_REVISION_MASK); - phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); + phy->id |= (u32)(phy_id & PHY_REVISION_MASK); + phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); out: return ret_val; --- ./src/drivers/net/ath/ath5k/ath5k_phy.c.orig 2016-09-01 13:32:38.317143990 -0400 +++ ./src/drivers/net/ath/ath5k/ath5k_phy.c 2016-09-01 14:09:20.384196492 -0400 @@ -1219,12 +1219,12 @@ /* Update radio registers */ ath5k_hw_reg_write(ah, (phy_sig & ~(AR5K_PHY_SIG_FIRPWR)) | - AR5K_REG_SM(-1, AR5K_PHY_SIG_FIRPWR), AR5K_PHY_SIG); + AR5K_REG_SM(-1U, AR5K_PHY_SIG_FIRPWR), AR5K_PHY_SIG); ath5k_hw_reg_write(ah, (phy_agc & ~(AR5K_PHY_AGCCOARSE_HI | AR5K_PHY_AGCCOARSE_LO)) | - AR5K_REG_SM(-1, AR5K_PHY_AGCCOARSE_HI) | - AR5K_REG_SM(-127, AR5K_PHY_AGCCOARSE_LO), AR5K_PHY_AGCCOARSE); + AR5K_REG_SM(-1U, AR5K_PHY_AGCCOARSE_HI) | + AR5K_REG_SM(-127U, AR5K_PHY_AGCCOARSE_LO), AR5K_PHY_AGCCOARSE); ath5k_hw_reg_write(ah, (phy_sat & ~(AR5K_PHY_ADCSAT_ICNT | AR5K_PHY_ADCSAT_THR)) | --- ./src/drivers/net/ath/ath5k/ath5k.c.orig 2016-09-01 13:32:28.652143760 -0400 +++ ./src/drivers/net/ath/ath5k/ath5k.c 2016-09-01 14:08:21.819195095 -0400 @@ -85,46 +85,6 @@ PCI_ROM(0x168c, 0x001d, "ath2417", "Atheros 2417 Nala", AR5K_AR5212), }; -/* Known SREVs */ -static const struct ath5k_srev_name srev_names[] = { - { "5210", AR5K_VERSION_MAC, AR5K_SREV_AR5210 }, - { "5311", AR5K_VERSION_MAC, AR5K_SREV_AR5311 }, - { "5311A", AR5K_VERSION_MAC, AR5K_SREV_AR5311A }, - { "5311B", AR5K_VERSION_MAC, AR5K_SREV_AR5311B }, - { "5211", AR5K_VERSION_MAC, AR5K_SREV_AR5211 }, - { "5212", AR5K_VERSION_MAC, AR5K_SREV_AR5212 }, - { "5213", AR5K_VERSION_MAC, AR5K_SREV_AR5213 }, - { "5213A", AR5K_VERSION_MAC, AR5K_SREV_AR5213A }, - { "2413", AR5K_VERSION_MAC, AR5K_SREV_AR2413 }, - { "2414", AR5K_VERSION_MAC, AR5K_SREV_AR2414 }, - { "5424", AR5K_VERSION_MAC, AR5K_SREV_AR5424 }, - { "5413", AR5K_VERSION_MAC, AR5K_SREV_AR5413 }, - { "5414", AR5K_VERSION_MAC, AR5K_SREV_AR5414 }, - { "2415", AR5K_VERSION_MAC, AR5K_SREV_AR2415 }, - { "5416", AR5K_VERSION_MAC, AR5K_SREV_AR5416 }, - { "5418", AR5K_VERSION_MAC, AR5K_SREV_AR5418 }, - { "2425", AR5K_VERSION_MAC, AR5K_SREV_AR2425 }, - { "2417", AR5K_VERSION_MAC, AR5K_SREV_AR2417 }, - { "xxxxx", AR5K_VERSION_MAC, AR5K_SREV_UNKNOWN }, - { "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 }, - { "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 }, - { "5111A", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111A }, - { "2111", AR5K_VERSION_RAD, AR5K_SREV_RAD_2111 }, - { "5112", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112 }, - { "5112A", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112A }, - { "5112B", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112B }, - { "2112", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112 }, - { "2112A", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112A }, - { "2112B", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112B }, - { "2413", AR5K_VERSION_RAD, AR5K_SREV_RAD_2413 }, - { "5413", AR5K_VERSION_RAD, AR5K_SREV_RAD_5413 }, - { "2316", AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 }, - { "2317", AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 }, - { "5424", AR5K_VERSION_RAD, AR5K_SREV_RAD_5424 }, - { "5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 }, - { "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN }, -}; - #define ATH5K_SPMBL_NO 1 #define ATH5K_SPMBL_YES 2 #define ATH5K_SPMBL_BOTH 3 --- ./src/drivers/net/ath/ath5k/ath5k_reset.c.orig 2016-09-01 13:32:44.493144138 -0400 +++ ./src/drivers/net/ath/ath5k/ath5k_reset.c 2016-09-01 14:07:48.153194293 -0400 @@ -135,13 +135,6 @@ } -/* - * index into rates for control rates, we can set it up like this because - * this is only used for AR5212 and we know it supports G mode - */ -static const unsigned int control_rates[] = - { 0, 1, 1, 1, 4, 4, 6, 6, 8, 8, 8, 8 }; - /** * ath5k_hw_write_rate_duration - fill rate code to duration table * --- ./src/drivers/net/ath/ath9k/ath9k_eeprom.c.orig 2016-09-01 13:33:17.247144919 -0400 +++ ./src/drivers/net/ath/ath9k/ath9k_eeprom.c 2016-09-01 14:10:05.426197566 -0400 @@ -371,7 +371,7 @@ /* FIXME: array overrun? */ for (i = 0; i < numXpdGains; i++) { minPwrT4[i] = data_9287[idxL].pwrPdg[i][0]; - maxPwrT4[i] = data_9287[idxL].pwrPdg[i][4]; + maxPwrT4[i] = data_9287[idxL].pwrPdg[i][intercepts - 1]; ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], data_9287[idxL].pwrPdg[i], data_9287[idxL].vpdPdg[i], @@ -381,7 +381,7 @@ } else if (eeprom_4k) { for (i = 0; i < numXpdGains; i++) { minPwrT4[i] = data_4k[idxL].pwrPdg[i][0]; - maxPwrT4[i] = data_4k[idxL].pwrPdg[i][4]; + maxPwrT4[i] = data_4k[idxL].pwrPdg[i][intercepts - 1]; ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], data_4k[idxL].pwrPdg[i], data_4k[idxL].vpdPdg[i], @@ -391,7 +391,7 @@ } else { for (i = 0; i < numXpdGains; i++) { minPwrT4[i] = data_def[idxL].pwrPdg[i][0]; - maxPwrT4[i] = data_def[idxL].pwrPdg[i][4]; + maxPwrT4[i] = data_def[idxL].pwrPdg[i][intercepts - 1]; ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], data_def[idxL].pwrPdg[i], data_def[idxL].vpdPdg[i], --- ./src/drivers/net/via-rhine.c.orig 2016-09-01 13:33:48.177145656 -0400 +++ ./src/drivers/net/via-rhine.c 2016-09-01 14:03:12.604187723 -0400 @@ -947,11 +947,11 @@ // if (tp->chip_id == 0x3065) if( tp->chip_revision < 0x80 && tp->chip_revision >=0x40 ) intr_status |= inb(nic->ioaddr + IntrStatus2) << 16; - intr_status = (intr_status & ~DEFAULT_INTR); - if ( action == ENABLE ) - intr_status = intr_status | DEFAULT_INTR; - outw(intr_status, nic->ioaddr + IntrEnable); - break; + intr_status = (intr_status & ~DEFAULT_INTR); + if ( action == ENABLE ) + intr_status = intr_status | DEFAULT_INTR; + outw(intr_status, nic->ioaddr + IntrEnable); + break; case FORCE : outw(0x0010, nic->ioaddr + 0x84); break; --- ./src/drivers/net/via-velocity.c.orig 2016-09-01 13:33:56.257145849 -0400 +++ ./src/drivers/net/via-velocity.c 2016-09-01 14:05:20.607190775 -0400 @@ -89,13 +89,6 @@ #define RX_THRESH_MIN 0 #define RX_THRESH_MAX 3 #define RX_THRESH_DEF 0 -/* rx_thresh[] is used for controlling the receive fifo threshold. - 0: indicate the rxfifo threshold is 128 bytes. - 1: indicate the rxfifo threshold is 512 bytes. - 2: indicate the rxfifo threshold is 1024 bytes. - 3: indicate the rxfifo threshold is store & forward. -*/ -VELOCITY_PARAM(rx_thresh, "Receive fifo threshold"); #define DMA_LENGTH_MIN 0 #define DMA_LENGTH_MAX 7 --- ./src/drivers/net/sis190.c.orig 2016-09-01 13:33:32.767145289 -0400 +++ ./src/drivers/net/sis190.c 2016-09-01 14:04:48.268190004 -0400 @@ -72,12 +72,6 @@ static const u32 sis190_intr_mask = RxQEmpty | RxQInt | TxQ1Int | TxQ0Int | RxHalt | TxHalt | LinkChange; -/* - * Maximum number of multicast addresses to filter (vs. Rx-all-multicast). - * The chips use a 64 element hash table based on the Ethernet CRC. - */ -static const int multicast_filter_limit = 32; - static void __mdio_cmd(void *ioaddr, u32 ctl) { unsigned int i; --- ./src/drivers/net/skge.c.orig 2016-09-01 13:33:39.681145453 -0400 +++ ./src/drivers/net/skge.c 2016-09-01 14:04:12.235189145 -0400 @@ -83,9 +83,6 @@ /* Avoid conditionals by using array */ static const int txqaddr[] = { Q_XA1, Q_XA2 }; static const int rxqaddr[] = { Q_R1, Q_R2 }; -static const u32 rxirqmask[] = { IS_R1_F, IS_R2_F }; -static const u32 txirqmask[] = { IS_XA1_F, IS_XA2_F }; -static const u32 napimask[] = { IS_R1_F|IS_XA1_F, IS_R2_F|IS_XA2_F }; static const u32 portmask[] = { IS_PORT_1, IS_PORT_2 }; /* Determine supported/advertised modes based on hardware. @@ -1921,8 +1918,6 @@ skge->tx_ring.to_clean = e; } -static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 }; - static inline u16 phy_length(const struct skge_hw *hw, u32 status) { if (hw->chip_id == CHIP_ID_GENESIS) --- ./src/drivers/net/e1000/e1000_phy.c.orig 2016-09-01 13:33:26.591145141 -0400 +++ ./src/drivers/net/e1000/e1000_phy.c 2016-09-01 14:05:59.666191706 -0400 @@ -167,18 +167,18 @@ if (!(phy->ops.read_reg)) goto out; - ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); - if (ret_val) - goto out; + ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); + if (ret_val) + goto out; - phy->id = (u32)(phy_id << 16); - usec_delay(20); - ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); - if (ret_val) - goto out; + phy->id = (u32)(phy_id << 16); + usec_delay(20); + ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); + if (ret_val) + goto out; - phy->id |= (u32)(phy_id & PHY_REVISION_MASK); - phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); + phy->id |= (u32)(phy_id & PHY_REVISION_MASK); + phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); out: return ret_val;