(XEN) Xen version 4.12.2-pre (root@) (gcc (GCC) 4.4.7 20120313 (Red Hat 4.4.7-23.0.1)) debug=n  Tue Oct 29 02:43:40 PDT 2019
(XEN) Latest ChangeSet:                                                         
(XEN) Bootloader: GRUB 2.02~beta2                                               
(XEN) Command line: placeholder dom0_mem=max:3456M allowsuperpage dom0_vcpus_pin=numa dom0_max_vcpus=4 crashkernel=512M@1024M iommu=1 hvm_debug=832 guest_loglvl=all com1=115200,8n1 console=com1 conring_size=1m console_to_ring                                     
(XEN) Xen image load base address: 0x77200000                                   
(XEN) Video information:                                                        
(XEN)  VGA is text mode 80x25, font 8x16                                        
(XEN)  VBE/DDC methods: none; EDID transfer time: 0 seconds                     
(XEN)  EDID info not retrieved because no DDC retrieval method detected         
(XEN) Disc information:                                                         
(XEN)  Found 2 MBR signatures                                                   
(XEN)  Found 2 EDD information structures                                       
(XEN) Xen-e820 RAM map:                                                         
(XEN)  0000000000000000 - 000000000009b000 (usable)                             
(XEN)  000000000009b000 - 00000000000a0000 (reserved)                           
(XEN)  00000000000e0000 - 0000000000100000 (reserved)                           
(XEN)  0000000000100000 - 0000000077928000 (usable)                             
(XEN)  0000000077928000 - 0000000079356000 (reserved)                          
(XEN)  0000000079356000 - 0000000079391000 (ACPI data)
(XEN)  0000000079391000 - 0000000079900000 (ACPI NVS)
(XEN)  0000000079900000 - 000000007bd4d000 (reserved)
(XEN)  000000007bd4d000 - 000000007bd58000 (usable)
(XEN)  000000007bd58000 - 000000007bd59000 (reserved)
(XEN)  000000007bd59000 - 000000007bd5c000 (usable)
(XEN)  000000007bd5c000 - 000000007bd5d000 (reserved)
(XEN)  000000007bd5d000 - 000000007bd5e000 (usable)
(XEN)  000000007bd5e000 - 000000007bde4000 (reserved)
(XEN)  000000007bde4000 - 000000007c000000 (usable)
(XEN)  0000000080000000 - 0000000090000000 (reserved)
(XEN)  00000000fed1c000 - 00000000fed20000 (reserved)
(XEN)  00000000ff000000 - 0000000100000000 (reserved)
(XEN)  0000000100000000 - 0000002080000000 (usable)
(XEN) Kdump: 512MB (524288kB) at 0x40000000
(XEN) ACPI: RSDP 000F0530, 0024 (r2 ORACLE)
(XEN) ACPI: XSDT 7936C0B0, 00E4 (r1 ORACLE     X5-2 30130200 AMI     10013)
(XEN) ACPI: FACP 7937F608, 010C (r5 ORACLE     X5-2 30130200 AMI     10013)
(XEN) ACPI: DSDT 7936C228, 133DE (r2 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: FACS 798FDF80, 0040
(XEN) ACPI: APIC 7937F718, 0224 (r3 ORACLE     X5-2 30130200 AMI     10013)
(XEN) ACPI: FPDT 7937F940, 0044 (r1 ORACLE     X5-2 30130200 AMI     10013)
(XEN) ACPI: FIDT 7937F988, 009C (r1 ORACLE     X5-2 30130200 AMI     10013)
(XEN) ACPI: SPMI 7937FA28, 0041 (r5 ORACLE     X5-2 30130200 AMI.        0)
(XEN) ACPI: MCFG 7937FA70, 003C (r1 ORACLE     X5-2 30130200 MSFT       97)
(XEN) ACPI: OEMS 7937FAB0, 07DC (r1 ORACLE     X5-2 30130200 ORCL        1)
(XEN) ACPI: UEFI 79380290, 0042 (r1 ORACLE     X5-2 30130200             0)
(XEN) ACPI: BDAT 793802D8, 0030 (r1 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: HPET 79380308, 0038 (r1 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: MSCT 79380340, 0090 (r1 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: PCCT 793803D0, 006E (r1 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: PMCT 79380440, 0064 (r1 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: PMTT 793804A8, 0268 (r1 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: SLIT 79380710, 0030 (r1 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: SRAT 79380740, 0E58 (r3 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: WDDT 79381598, 0040 (r1 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: SSDT 793815D8, ED2F (r1 ORACLE    PmMgt 30130200 INTL 20120913)
(XEN) ACPI: OEMP 79390308, 0158 (r1 ORACLE     X5-2 30130200 ORCL        1)
(XEN) ACPI: DMAR 79390460, 0148 (r1 ORACLE     X5-2 30130200 INTL 20091013)
(XEN) ACPI: HEST 793905A8, 013C (r1 ORACLE     X5-2 30130200 INTL        1)
(XEN) ACPI: BERT 793906E8, 0030 (r1 ORACLE     X5-2 30130200 INTL        1)
(XEN) ACPI: ERST 79390718, 0230 (r1 ORACLE     X5-2 30130200 INTL        1)
(XEN) ACPI: EINJ 79390948, 0130 (r1 ORACLE     X5-2 30130200 INTL        1)
(XEN) System RAM: 130938MB (134081464kB)
(XEN) Domain heap initialised DMA width 32 bits
(XEN) Allocated console ring of 1024 KiB.
(XEN) ACPI: 32/64X FACS address mismatch in FADT - 798fdf80/0000000000000000, using 32
(XEN) IOAPIC[0]: apic_id 8, version 32, address 0xfec00000, GSI 0-23
(XEN) IOAPIC[1]: apic_id 9, version 32, address 0xfec01000, GSI 24-47
(XEN) IOAPIC[2]: apic_id 10, version 32, address 0xfec40000, GSI 48-71
(XEN) Enabling APIC mode:  Phys.  Using 3 I/O APICs
(XEN) Switched to APIC driver x2apic_cluster
(XEN) xstate: size: 0x340 and states: 0x7
(XEN) CMCI: threshold 0x2 too large for CPU0 bank 17, using 0x1
(XEN) CMCI: threshold 0x2 too large for CPU0 bank 18, using 0x1
(XEN) CMCI: threshold 0x2 too large for CPU0 bank 19, using 0x1
(XEN) Speculative mitigation facilities:
(XEN)   Hardware features:
(XEN)   Compiled-in support: INDIRECT_THUNK SHADOW_PAGING
(XEN)   Xen settings: BTI-Thunk RETPOLINE, SPEC_CTRL: No, Other:
(XEN)   L1TF: believed vulnerable, maxphysaddr L1D 46, CPUID 46, Safe address 300000000000
(XEN)   Support for HVM VMs: RSB EAGER_FPU
(XEN)   Support for PV VMs: RSB EAGER_FPU
(XEN)   XPTI (64-bit PV only): Dom0 enabled, DomU enabled (with PCID)
(XEN)   PV L1TF shadowing: Dom0 disabled, DomU enabled
(XEN) Using scheduler: SMP Credit Scheduler rev2 (credit2)
(XEN) Initializing Credit2 scheduler
(XEN) Platform timer is 14.318MHz HPET
(XEN) Detected 2394.674 MHz processor.
(XEN) Initing memory sharing.
(XEN) Intel VT-d iommu 0 supported page sizes: 4kB, 2MB, 1GB.
(XEN) Intel VT-d iommu 1 supported page sizes: 4kB, 2MB, 1GB.
(XEN) Intel VT-d Snoop Control enabled.
(XEN) Intel VT-d Dom0 DMA Passthrough not enabled.
(XEN) Intel VT-d Queued Invalidation enabled.
(XEN) Intel VT-d Interrupt Remapping enabled.
(XEN) Intel VT-d Posted Interrupt not enabled.
(XEN) Intel VT-d Shared EPT tables enabled.
(XEN) I/O virtualisation enabled
(XEN)  - Dom0 mode: Relaxed
(XEN) Interrupt remapping enabled
(XEN) Enabled directed EOI with ioapic_ack_old on!
(XEN) ENABLING IO-APIC IRQs
(XEN)  -> Using old ACK method
(XEN) VMX: Supported advanced features:
(XEN)  - APIC MMIO access virtualisation
(XEN)  - APIC TPR shadow
(XEN)  - Extended Page Tables (EPT)
(XEN)  - Virtual-Processor Identifiers (VPID)
(XEN)  - Virtual NMI
(XEN)  - MSR direct-access bitmap
(XEN)  - Unrestricted Guest
(XEN)  - APIC Register Virtualization
(XEN)  - Virtual Interrupt Delivery
(XEN)  - Posted Interrupt Processing
(XEN)  - VMCS shadowing
(XEN)  - VM Functions
(XEN) HVM: ASIDs enabled.
(XEN) HVM: VMX enabled
(XEN) HVM: Hardware Assisted Paging (HAP) detected
(XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB
(XEN) CMCI: threshold 0x2 too large for CPU16 bank 17, using 0x1
(XEN) CMCI: threshold 0x2 too large for CPU16 bank 18, using 0x1
(XEN) CMCI: threshold 0x2 too large for CPU16 bank 19, using 0x1
(XEN) Brought up 32 CPUs
(XEN) Dom0 has maximum 840 PIRQs
(XEN)  Xen  kernel: 64-bit, lsb, compat32
(XEN)  Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x217f000
(XEN) PHYSICAL MEMORY ARRANGEMENT:
(XEN)  Dom0 alloc.:   000000202c000000->0000002030000000 (858882 pages to be allocated)
(XEN)  Init. ramdisk: 000000207db02000->000000207ffff6a8
(XEN) VIRTUAL MEMORY ARRANGEMENT:
(XEN)  Loaded kernel: ffffffff81000000->ffffffff8217f000
(XEN)  Init. ramdisk: 0000000000000000->0000000000000000
(XEN)  Phys-Mach map: 0000008000000000->00000080006c0000
(XEN)  Start info:    ffffffff8217f000->ffffffff8217f4b8
(XEN)  Xenstore ring: 0000000000000000->0000000000000000
(XEN)  Console ring:  0000000000000000->0000000000000000
(XEN)  Page tables:   ffffffff82180000->ffffffff82195000
(XEN)  Boot stack:    ffffffff82195000->ffffffff82196000
(XEN)  TOTAL:         ffffffff80000000->ffffffff82400000
(XEN)  ENTRY ADDRESS: ffffffff81c871f0
(XEN) Dom0 has maximum 4 VCPUs
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Scrubbing Free RAM in background
(XEN) Std. Loglevel: Errors and warnings
(XEN) Guest Loglevel: All
(XEN) ***************************************************
(XEN) Booted on L1TF-vulnerable hardware with SMT/Hyperthreading
(XEN) enabled.  Please assess your configuration and choose an
(XEN) explicit 'smt=<bool>' setting.  See XSA-273.
(XEN) ***************************************************
(XEN) Booted on MLPDS/MFBDS-vulnerable hardware with SMT/Hyperthreading
(XEN) enabled.  Mitigations will not be fully effective.  Please
(XEN) choose an explicit smt=<bool> setting.  See XSA-297.
(XEN) ***************************************************
(XEN) 3... 2... 1... 
(XEN) *** Serial input to DOM0 (type 'CTRL-a' three times to switch input)
(XEN) Freed 488kB init memory
ca-dev39.us.oracle.com login: (XEN) HVM d1v0 save: CPU
(XEN) HVM d1v1 save: CPU
(XEN) HVM d1v2 save: CPU
(XEN) HVM d1v3 save: CPU
(XEN) HVM d1v4 save: CPU
(XEN) HVM d1v5 save: CPU
(XEN) HVM d1v6 save: CPU
(XEN) HVM d1v7 save: CPU
(XEN) HVM d1v8 save: CPU
(XEN) HVM d1v9 save: CPU
(XEN) HVM d1v10 save: CPU
(XEN) HVM d1v11 save: CPU
(XEN) HVM d1v12 save: CPU
(XEN) HVM d1v13 save: CPU
(XEN) HVM d1v14 save: CPU
(XEN) HVM d1v15 save: CPU
(XEN) HVM d1v16 save: CPU
(XEN) HVM d1v17 save: CPU
(XEN) HVM d1v18 save: CPU
(XEN) HVM d1v19 save: CPU
(XEN) HVM d1v20 save: CPU
(XEN) HVM d1v21 save: CPU
(XEN) HVM d1v22 save: CPU
(XEN) HVM d1v23 save: CPU
(XEN) HVM d1v24 save: CPU
(XEN) HVM d1v25 save: CPU
(XEN) HVM d1v26 save: CPU
(XEN) HVM d1v27 save: CPU
(XEN) HVM d1v28 save: CPU
(XEN) HVM d1v29 save: CPU
(XEN) HVM d1v30 save: CPU
(XEN) HVM d1v31 save: CPU
(XEN) HVM d1 save: PIC
(XEN) HVM d1 save: IOAPIC
(XEN) HVM d1v0 save: LAPIC
(XEN) HVM d1v1 save: LAPIC
(XEN) HVM d1v2 save: LAPIC
(XEN) HVM d1v3 save: LAPIC
(XEN) HVM d1v4 save: LAPIC
(XEN) HVM d1v5 save: LAPIC
(XEN) HVM d1v6 save: LAPIC
(XEN) HVM d1v7 save: LAPIC
(XEN) HVM d1v8 save: LAPIC
(XEN) HVM d1v9 save: LAPIC
(XEN) HVM d1v10 save: LAPIC
(XEN) HVM d1v11 save: LAPIC
(XEN) HVM d1v12 save: LAPIC
(XEN) HVM d1v13 save: LAPIC
(XEN) HVM d1v14 save: LAPIC
(XEN) HVM d1v15 save: LAPIC
(XEN) HVM d1v16 save: LAPIC
(XEN) HVM d1v17 save: LAPIC
(XEN) HVM d1v18 save: LAPIC
(XEN) HVM d1v19 save: LAPIC
(XEN) HVM d1v20 save: LAPIC
(XEN) HVM d1v21 save: LAPIC
(XEN) HVM d1v22 save: LAPIC
(XEN) HVM d1v23 save: LAPIC
(XEN) HVM d1v24 save: LAPIC
(XEN) HVM d1v25 save: LAPIC
(XEN) HVM d1v26 save: LAPIC
(XEN) HVM d1v27 save: LAPIC
(XEN) HVM d1v28 save: LAPIC
(XEN) HVM d1v29 save: LAPIC
(XEN) HVM d1v30 save: LAPIC
(XEN) HVM d1v31 save: LAPIC
(XEN) HVM d1v0 save: LAPIC_REGS
(XEN) HVM d1v1 save: LAPIC_REGS
(XEN) HVM d1v2 save: LAPIC_REGS
(XEN) HVM d1v3 save: LAPIC_REGS
(XEN) HVM d1v4 save: LAPIC_REGS
(XEN) HVM d1v5 save: LAPIC_REGS
(XEN) HVM d1v6 save: LAPIC_REGS
(XEN) HVM d1v7 save: LAPIC_REGS
(XEN) HVM d1v8 save: LAPIC_REGS
(XEN) HVM d1v9 save: LAPIC_REGS
(XEN) HVM d1v10 save: LAPIC_REGS
(XEN) HVM d1v11 save: LAPIC_REGS
(XEN) HVM d1v12 save: LAPIC_REGS
(XEN) HVM d1v13 save: LAPIC_REGS
(XEN) HVM d1v14 save: LAPIC_REGS
(XEN) HVM d1v15 save: LAPIC_REGS
(XEN) HVM d1v16 save: LAPIC_REGS
(XEN) HVM d1v17 save: LAPIC_REGS
(XEN) HVM d1v18 save: LAPIC_REGS
(XEN) HVM d1v19 save: LAPIC_REGS
(XEN) HVM d1v20 save: LAPIC_REGS
(XEN) HVM d1v21 save: LAPIC_REGS
(XEN) HVM d1v22 save: LAPIC_REGS
(XEN) HVM d1v23 save: LAPIC_REGS
(XEN) HVM d1v24 save: LAPIC_REGS
(XEN) HVM d1v25 save: LAPIC_REGS
(XEN) HVM d1v26 save: LAPIC_REGS
(XEN) HVM d1v27 save: LAPIC_REGS
(XEN) HVM d1v28 save: LAPIC_REGS
(XEN) HVM d1v29 save: LAPIC_REGS
(XEN) HVM d1v30 save: LAPIC_REGS
(XEN) HVM d1v31 save: LAPIC_REGS
(XEN) HVM d1 save: PCI_IRQ
(XEN) HVM d1 save: ISA_IRQ
(XEN) HVM d1 save: PCI_LINK
(XEN) HVM d1 save: PIT
(XEN) HVM d1 save: RTC
(XEN) HVM d1 save: HPET
(XEN) HVM d1 save: PMTIMER
(XEN) HVM d1v0 save: MTRR
(XEN) HVM d1v1 save: MTRR
(XEN) HVM d1v2 save: MTRR
(XEN) HVM d1v3 save: MTRR
(XEN) HVM d1v4 save: MTRR
(XEN) HVM d1v5 save: MTRR
(XEN) HVM d1v6 save: MTRR
(XEN) HVM d1v7 save: MTRR
(XEN) HVM d1v8 save: MTRR
(XEN) HVM d1v9 save: MTRR
(XEN) HVM d1v10 save: MTRR
(XEN) HVM d1v11 save: MTRR
(XEN) HVM d1v12 save: MTRR
(XEN) HVM d1v13 save: MTRR
(XEN) HVM d1v14 save: MTRR
(XEN) HVM d1v15 save: MTRR
(XEN) HVM d1v16 save: MTRR
(XEN) HVM d1v17 save: MTRR
(XEN) HVM d1v18 save: MTRR
(XEN) HVM d1v19 save: MTRR
(XEN) HVM d1v20 save: MTRR
(XEN) HVM d1v21 save: MTRR
(XEN) HVM d1v22 save: MTRR
(XEN) HVM d1v23 save: MTRR
(XEN) HVM d1v24 save: MTRR
(XEN) HVM d1v25 save: MTRR
(XEN) HVM d1v26 save: MTRR
(XEN) HVM d1v27 save: MTRR
(XEN) HVM d1v28 save: MTRR
(XEN) HVM d1v29 save: MTRR
(XEN) HVM d1v30 save: MTRR
(XEN) HVM d1v31 save: MTRR
(XEN) HVM d1 save: VIRIDIAN_DOMAIN
(XEN) HVM d1v0 save: CPU_XSAVE
(XEN) HVM d1v1 save: CPU_XSAVE
(XEN) HVM d1v2 save: CPU_XSAVE
(XEN) HVM d1v3 save: CPU_XSAVE
(XEN) HVM d1v4 save: CPU_XSAVE
(XEN) HVM d1v5 save: CPU_XSAVE
(XEN) HVM d1v6 save: CPU_XSAVE
(XEN) HVM d1v7 save: CPU_XSAVE
(XEN) HVM d1v8 save: CPU_XSAVE
(XEN) HVM d1v9 save: CPU_XSAVE
(XEN) HVM d1v10 save: CPU_XSAVE
(XEN) HVM d1v11 save: CPU_XSAVE
(XEN) HVM d1v12 save: CPU_XSAVE
(XEN) HVM d1v13 save: CPU_XSAVE
(XEN) HVM d1v14 save: CPU_XSAVE
(XEN) HVM d1v15 save: CPU_XSAVE
(XEN) HVM d1v16 save: CPU_XSAVE
(XEN) HVM d1v17 save: CPU_XSAVE
(XEN) HVM d1v18 save: CPU_XSAVE
(XEN) HVM d1v19 save: CPU_XSAVE
(XEN) HVM d1v20 save: CPU_XSAVE
(XEN) HVM d1v21 save: CPU_XSAVE
(XEN) HVM d1v22 save: CPU_XSAVE
(XEN) HVM d1v23 save: CPU_XSAVE
(XEN) HVM d1v24 save: CPU_XSAVE
(XEN) HVM d1v25 save: CPU_XSAVE
(XEN) HVM d1v26 save: CPU_XSAVE
(XEN) HVM d1v27 save: CPU_XSAVE
(XEN) HVM d1v28 save: CPU_XSAVE
(XEN) HVM d1v29 save: CPU_XSAVE
(XEN) HVM d1v30 save: CPU_XSAVE
(XEN) HVM d1v31 save: CPU_XSAVE
(XEN) HVM d1v0 save: VIRIDIAN_VCPU
(XEN) HVM d1v1 save: VIRIDIAN_VCPU
(XEN) HVM d1v2 save: VIRIDIAN_VCPU
(XEN) HVM d1v3 save: VIRIDIAN_VCPU
(XEN) HVM d1v4 save: VIRIDIAN_VCPU
(XEN) HVM d1v5 save: VIRIDIAN_VCPU
(XEN) HVM d1v6 save: VIRIDIAN_VCPU
(XEN) HVM d1v7 save: VIRIDIAN_VCPU
(XEN) HVM d1v8 save: VIRIDIAN_VCPU
(XEN) HVM d1v9 save: VIRIDIAN_VCPU
(XEN) HVM d1v10 save: VIRIDIAN_VCPU
(XEN) HVM d1v11 save: VIRIDIAN_VCPU
(XEN) HVM d1v12 save: VIRIDIAN_VCPU
(XEN) HVM d1v13 save: VIRIDIAN_VCPU
(XEN) HVM d1v14 save: VIRIDIAN_VCPU
(XEN) HVM d1v15 save: VIRIDIAN_VCPU
(XEN) HVM d1v16 save: VIRIDIAN_VCPU
(XEN) HVM d1v17 save: VIRIDIAN_VCPU
(XEN) HVM d1v18 save: VIRIDIAN_VCPU
(XEN) HVM d1v19 save: VIRIDIAN_VCPU
(XEN) HVM d1v20 save: VIRIDIAN_VCPU
(XEN) HVM d1v21 save: VIRIDIAN_VCPU
(XEN) HVM d1v22 save: VIRIDIAN_VCPU
(XEN) HVM d1v23 save: VIRIDIAN_VCPU
(XEN) HVM d1v24 save: VIRIDIAN_VCPU
(XEN) HVM d1v25 save: VIRIDIAN_VCPU
(XEN) HVM d1v26 save: VIRIDIAN_VCPU
(XEN) HVM d1v27 save: VIRIDIAN_VCPU
(XEN) HVM d1v28 save: VIRIDIAN_VCPU
(XEN) HVM d1v29 save: VIRIDIAN_VCPU
(XEN) HVM d1v30 save: VIRIDIAN_VCPU
(XEN) HVM d1v31 save: VIRIDIAN_VCPU
(XEN) HVM d1v0 save: VMCE_VCPU
(XEN) HVM d1v1 save: VMCE_VCPU
(XEN) HVM d1v2 save: VMCE_VCPU
(XEN) HVM d1v3 save: VMCE_VCPU
(XEN) HVM d1v4 save: VMCE_VCPU
(XEN) HVM d1v5 save: VMCE_VCPU
(XEN) HVM d1v6 save: VMCE_VCPU
(XEN) HVM d1v7 save: VMCE_VCPU
(XEN) HVM d1v8 save: VMCE_VCPU
(XEN) HVM d1v9 save: VMCE_VCPU
(XEN) HVM d1v10 save: VMCE_VCPU
(XEN) HVM d1v11 save: VMCE_VCPU
(XEN) HVM d1v12 save: VMCE_VCPU
(XEN) HVM d1v13 save: VMCE_VCPU
(XEN) HVM d1v14 save: VMCE_VCPU
(XEN) HVM d1v15 save: VMCE_VCPU
(XEN) HVM d1v16 save: VMCE_VCPU
(XEN) HVM d1v17 save: VMCE_VCPU
(XEN) HVM d1v18 save: VMCE_VCPU
(XEN) HVM d1v19 save: VMCE_VCPU
(XEN) HVM d1v20 save: VMCE_VCPU
(XEN) HVM d1v21 save: VMCE_VCPU
(XEN) HVM d1v22 save: VMCE_VCPU
(XEN) HVM d1v23 save: VMCE_VCPU
(XEN) HVM d1v24 save: VMCE_VCPU
(XEN) HVM d1v25 save: VMCE_VCPU
(XEN) HVM d1v26 save: VMCE_VCPU
(XEN) HVM d1v27 save: VMCE_VCPU
(XEN) HVM d1v28 save: VMCE_VCPU
(XEN) HVM d1v29 save: VMCE_VCPU
(XEN) HVM d1v30 save: VMCE_VCPU
(XEN) HVM d1v31 save: VMCE_VCPU
(XEN) HVM d1v0 save: TSC_ADJUST
(XEN) HVM d1v1 save: TSC_ADJUST
(XEN) HVM d1v2 save: TSC_ADJUST
(XEN) HVM d1v3 save: TSC_ADJUST
(XEN) HVM d1v4 save: TSC_ADJUST
(XEN) HVM d1v5 save: TSC_ADJUST
(XEN) HVM d1v6 save: TSC_ADJUST
(XEN) HVM d1v7 save: TSC_ADJUST
(XEN) HVM d1v8 save: TSC_ADJUST
(XEN) HVM d1v9 save: TSC_ADJUST
(XEN) HVM d1v10 save: TSC_ADJUST
(XEN) HVM d1v11 save: TSC_ADJUST
(XEN) HVM d1v12 save: TSC_ADJUST
(XEN) HVM d1v13 save: TSC_ADJUST
(XEN) HVM d1v14 save: TSC_ADJUST
(XEN) HVM d1v15 save: TSC_ADJUST
(XEN) HVM d1v16 save: TSC_ADJUST
(XEN) HVM d1v17 save: TSC_ADJUST
(XEN) HVM d1v18 save: TSC_ADJUST
(XEN) HVM d1v19 save: TSC_ADJUST
(XEN) HVM d1v20 save: TSC_ADJUST
(XEN) HVM d1v21 save: TSC_ADJUST
(XEN) HVM d1v22 save: TSC_ADJUST
(XEN) HVM d1v23 save: TSC_ADJUST
(XEN) HVM d1v24 save: TSC_ADJUST
(XEN) HVM d1v25 save: TSC_ADJUST
(XEN) HVM d1v26 save: TSC_ADJUST
(XEN) HVM d1v27 save: TSC_ADJUST
(XEN) HVM d1v28 save: TSC_ADJUST
(XEN) HVM d1v29 save: TSC_ADJUST
(XEN) HVM d1v30 save: TSC_ADJUST
(XEN) HVM d1v31 save: TSC_ADJUST
(XEN) HVM d1v0 save: CPU_MSR
(XEN) HVM d1v1 save: CPU_MSR
(XEN) HVM d1v2 save: CPU_MSR
(XEN) HVM d1v3 save: CPU_MSR
(XEN) HVM d1v4 save: CPU_MSR
(XEN) HVM d1v5 save: CPU_MSR
(XEN) HVM d1v6 save: CPU_MSR
(XEN) HVM d1v7 save: CPU_MSR
(XEN) HVM d1v8 save: CPU_MSR
(XEN) HVM d1v9 save: CPU_MSR
(XEN) HVM d1v10 save: CPU_MSR
(XEN) HVM d1v11 save: CPU_MSR
(XEN) HVM d1v12 save: CPU_MSR
(XEN) HVM d1v13 save: CPU_MSR
(XEN) HVM d1v14 save: CPU_MSR
(XEN) HVM d1v15 save: CPU_MSR
(XEN) HVM d1v16 save: CPU_MSR
(XEN) HVM d1v17 save: CPU_MSR
(XEN) HVM d1v18 save: CPU_MSR
(XEN) HVM d1v19 save: CPU_MSR
(XEN) HVM d1v20 save: CPU_MSR
(XEN) HVM d1v21 save: CPU_MSR
(XEN) HVM d1v22 save: CPU_MSR
(XEN) HVM d1v23 save: CPU_MSR
(XEN) HVM d1v24 save: CPU_MSR
(XEN) HVM d1v25 save: CPU_MSR
(XEN) HVM d1v26 save: CPU_MSR
(XEN) HVM d1v27 save: CPU_MSR
(XEN) HVM d1v28 save: CPU_MSR
(XEN) HVM d1v29 save: CPU_MSR
(XEN) HVM d1v30 save: CPU_MSR
(XEN) HVM d1v31 save: CPU_MSR
(XEN) HVM1 restore: CPU 0
(XEN) memory_map:add: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:add: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:add: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:add: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:add: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:add: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:add: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:add: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:add: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:add: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) HVM d2v0 save: CPU
(XEN) HVM d2v1 save: CPU
(XEN) HVM d2v2 save: CPU
(XEN) HVM d2v3 save: CPU
(XEN) HVM d2v4 save: CPU
(XEN) HVM d2v5 save: CPU
(XEN) HVM d2v6 save: CPU
(XEN) HVM d2v7 save: CPU
(XEN) HVM d2v8 save: CPU
(XEN) HVM d2v9 save: CPU
(XEN) HVM d2v10 save: CPU
(XEN) HVM d2v11 save: CPU
(XEN) HVM d2v12 save: CPU
(XEN) HVM d2v13 save: CPU
(XEN) HVM d2v14 save: CPU
(XEN) HVM d2v15 save: CPU
(XEN) HVM d2v16 save: CPU
(XEN) HVM d2v17 save: CPU
(XEN) HVM d2v18 save: CPU
(XEN) HVM d2v19 save: CPU
(XEN) HVM d2v20 save: CPU
(XEN) HVM d2v21 save: CPU
(XEN) HVM d2v22 save: CPU
(XEN) HVM d2v23 save: CPU
(XEN) HVM d2v24 save: CPU
(XEN) HVM d2v25 save: CPU
(XEN) HVM d2v26 save: CPU
(XEN) HVM d2v27 save: CPU
(XEN) HVM d2v28 save: CPU
(XEN) HVM d2v29 save: CPU
(XEN) HVM d2v30 save: CPU
(XEN) HVM d2v31 save: CPU
(XEN) HVM d2 save: PIC
(XEN) HVM d2 save: IOAPIC
(XEN) HVM d2v0 save: LAPIC
(XEN) HVM d2v1 save: LAPIC
(XEN) HVM d2v2 save: LAPIC
(XEN) HVM d2v3 save: LAPIC
(XEN) HVM d2v4 save: LAPIC
(XEN) HVM d2v5 save: LAPIC
(XEN) HVM d2v6 save: LAPIC
(XEN) HVM d2v7 save: LAPIC
(XEN) HVM d2v8 save: LAPIC
(XEN) HVM d2v9 save: LAPIC
(XEN) HVM d2v10 save: LAPIC
(XEN) HVM d2v11 save: LAPIC
(XEN) HVM d2v12 save: LAPIC
(XEN) HVM d2v13 save: LAPIC
(XEN) HVM d2v14 save: LAPIC
(XEN) HVM d2v15 save: LAPIC
(XEN) HVM d2v16 save: LAPIC
(XEN) HVM d2v17 save: LAPIC
(XEN) HVM d2v18 save: LAPIC
(XEN) HVM d2v19 save: LAPIC
(XEN) HVM d2v20 save: LAPIC
(XEN) HVM d2v21 save: LAPIC
(XEN) HVM d2v22 save: LAPIC
(XEN) HVM d2v23 save: LAPIC
(XEN) HVM d2v24 save: LAPIC
(XEN) HVM d2v25 save: LAPIC
(XEN) HVM d2v26 save: LAPIC
(XEN) HVM d2v27 save: LAPIC
(XEN) HVM d2v28 save: LAPIC
(XEN) HVM d2v29 save: LAPIC
(XEN) HVM d2v30 save: LAPIC
(XEN) HVM d2v31 save: LAPIC
(XEN) HVM d2v0 save: LAPIC_REGS
(XEN) HVM d2v1 save: LAPIC_REGS
(XEN) HVM d2v2 save: LAPIC_REGS
(XEN) HVM d2v3 save: LAPIC_REGS
(XEN) HVM d2v4 save: LAPIC_REGS
(XEN) HVM d2v5 save: LAPIC_REGS
(XEN) HVM d2v6 save: LAPIC_REGS
(XEN) HVM d2v7 save: LAPIC_REGS
(XEN) HVM d2v8 save: LAPIC_REGS
(XEN) HVM d2v9 save: LAPIC_REGS
(XEN) HVM d2v10 save: LAPIC_REGS
(XEN) HVM d2v11 save: LAPIC_REGS
(XEN) HVM d2v12 save: LAPIC_REGS
(XEN) HVM d2v13 save: LAPIC_REGS
(XEN) HVM d2v14 save: LAPIC_REGS
(XEN) HVM d2v15 save: LAPIC_REGS
(XEN) HVM d2v16 save: LAPIC_REGS
(XEN) HVM d2v17 save: LAPIC_REGS
(XEN) HVM d2v18 save: LAPIC_REGS
(XEN) HVM d2v19 save: LAPIC_REGS
(XEN) HVM d2v20 save: LAPIC_REGS
(XEN) HVM d2v21 save: LAPIC_REGS
(XEN) HVM d2v22 save: LAPIC_REGS
(XEN) HVM d2v23 save: LAPIC_REGS
(XEN) HVM d2v24 save: LAPIC_REGS
(XEN) HVM d2v25 save: LAPIC_REGS
(XEN) HVM d2v26 save: LAPIC_REGS
(XEN) HVM d2v27 save: LAPIC_REGS
(XEN) HVM d2v28 save: LAPIC_REGS
(XEN) HVM d2v29 save: LAPIC_REGS
(XEN) HVM d2v30 save: LAPIC_REGS
(XEN) HVM d2v31 save: LAPIC_REGS
(XEN) HVM d2 save: PCI_IRQ
(XEN) HVM d2 save: ISA_IRQ
(XEN) HVM d2 save: PCI_LINK
(XEN) HVM d2 save: PIT
(XEN) HVM d2 save: RTC
(XEN) HVM d2 save: HPET
(XEN) HVM d2 save: PMTIMER
(XEN) HVM d2v0 save: MTRR
(XEN) HVM d2v1 save: MTRR
(XEN) HVM d2v2 save: MTRR
(XEN) HVM d2v3 save: MTRR
(XEN) HVM d2v4 save: MTRR
(XEN) HVM d2v5 save: MTRR
(XEN) HVM d2v6 save: MTRR
(XEN) HVM d2v7 save: MTRR
(XEN) HVM d2v8 save: MTRR
(XEN) HVM d2v9 save: MTRR
(XEN) HVM d2v10 save: MTRR
(XEN) HVM d2v11 save: MTRR
(XEN) HVM d2v12 save: MTRR
(XEN) HVM d2v13 save: MTRR
(XEN) HVM d2v14 save: MTRR
(XEN) HVM d2v15 save: MTRR
(XEN) HVM d2v16 save: MTRR
(XEN) HVM d2v17 save: MTRR
(XEN) HVM d2v18 save: MTRR
(XEN) HVM d2v19 save: MTRR
(XEN) HVM d2v20 save: MTRR
(XEN) HVM d2v21 save: MTRR
(XEN) HVM d2v22 save: MTRR
(XEN) HVM d2v23 save: MTRR
(XEN) HVM d2v24 save: MTRR
(XEN) HVM d2v25 save: MTRR
(XEN) HVM d2v26 save: MTRR
(XEN) HVM d2v27 save: MTRR
(XEN) HVM d2v28 save: MTRR
(XEN) HVM d2v29 save: MTRR
(XEN) HVM d2v30 save: MTRR
(XEN) HVM d2v31 save: MTRR
(XEN) HVM d2 save: VIRIDIAN_DOMAIN
(XEN) HVM d2v0 save: CPU_XSAVE
(XEN) HVM d2v1 save: CPU_XSAVE
(XEN) HVM d2v2 save: CPU_XSAVE
(XEN) HVM d2v3 save: CPU_XSAVE
(XEN) HVM d2v4 save: CPU_XSAVE
(XEN) HVM d2v5 save: CPU_XSAVE
(XEN) HVM d2v6 save: CPU_XSAVE
(XEN) HVM d2v7 save: CPU_XSAVE
(XEN) HVM d2v8 save: CPU_XSAVE
(XEN) HVM d2v9 save: CPU_XSAVE
(XEN) HVM d2v10 save: CPU_XSAVE
(XEN) HVM d2v11 save: CPU_XSAVE
(XEN) HVM d2v12 save: CPU_XSAVE
(XEN) HVM d2v13 save: CPU_XSAVE
(XEN) HVM d2v14 save: CPU_XSAVE
(XEN) HVM d2v15 save: CPU_XSAVE
(XEN) HVM d2v16 save: CPU_XSAVE
(XEN) HVM d2v17 save: CPU_XSAVE
(XEN) HVM d2v18 save: CPU_XSAVE
(XEN) HVM d2v19 save: CPU_XSAVE
(XEN) HVM d2v20 save: CPU_XSAVE
(XEN) HVM d2v21 save: CPU_XSAVE
(XEN) HVM d2v22 save: CPU_XSAVE
(XEN) HVM d2v23 save: CPU_XSAVE
(XEN) HVM d2v24 save: CPU_XSAVE
(XEN) HVM d2v25 save: CPU_XSAVE
(XEN) HVM d2v26 save: CPU_XSAVE
(XEN) HVM d2v27 save: CPU_XSAVE
(XEN) HVM d2v28 save: CPU_XSAVE
(XEN) HVM d2v29 save: CPU_XSAVE
(XEN) HVM d2v30 save: CPU_XSAVE
(XEN) HVM d2v31 save: CPU_XSAVE
(XEN) HVM d2v0 save: VIRIDIAN_VCPU
(XEN) HVM d2v1 save: VIRIDIAN_VCPU
(XEN) HVM d2v2 save: VIRIDIAN_VCPU
(XEN) HVM d2v3 save: VIRIDIAN_VCPU
(XEN) HVM d2v4 save: VIRIDIAN_VCPU
(XEN) HVM d2v5 save: VIRIDIAN_VCPU
(XEN) HVM d2v6 save: VIRIDIAN_VCPU
(XEN) HVM d2v7 save: VIRIDIAN_VCPU
(XEN) HVM d2v8 save: VIRIDIAN_VCPU
(XEN) HVM d2v9 save: VIRIDIAN_VCPU
(XEN) HVM d2v10 save: VIRIDIAN_VCPU
(XEN) HVM d2v11 save: VIRIDIAN_VCPU
(XEN) HVM d2v12 save: VIRIDIAN_VCPU
(XEN) HVM d2v13 save: VIRIDIAN_VCPU
(XEN) HVM d2v14 save: VIRIDIAN_VCPU
(XEN) HVM d2v15 save: VIRIDIAN_VCPU
(XEN) HVM d2v16 save: VIRIDIAN_VCPU
(XEN) HVM d2v17 save: VIRIDIAN_VCPU
(XEN) HVM d2v18 save: VIRIDIAN_VCPU
(XEN) HVM d2v19 save: VIRIDIAN_VCPU
(XEN) HVM d2v20 save: VIRIDIAN_VCPU
(XEN) HVM d2v21 save: VIRIDIAN_VCPU
(XEN) HVM d2v22 save: VIRIDIAN_VCPU
(XEN) HVM d2v23 save: VIRIDIAN_VCPU
(XEN) HVM d2v24 save: VIRIDIAN_VCPU
(XEN) HVM d2v25 save: VIRIDIAN_VCPU
(XEN) HVM d2v26 save: VIRIDIAN_VCPU
(XEN) HVM d2v27 save: VIRIDIAN_VCPU
(XEN) HVM d2v28 save: VIRIDIAN_VCPU
(XEN) HVM d2v29 save: VIRIDIAN_VCPU
(XEN) HVM d2v30 save: VIRIDIAN_VCPU
(XEN) HVM d2v31 save: VIRIDIAN_VCPU
(XEN) HVM d2v0 save: VMCE_VCPU
(XEN) HVM d2v1 save: VMCE_VCPU
(XEN) HVM d2v2 save: VMCE_VCPU
(XEN) HVM d2v3 save: VMCE_VCPU
(XEN) HVM d2v4 save: VMCE_VCPU
(XEN) HVM d2v5 save: VMCE_VCPU
(XEN) HVM d2v6 save: VMCE_VCPU
(XEN) HVM d2v7 save: VMCE_VCPU
(XEN) HVM d2v8 save: VMCE_VCPU
(XEN) HVM d2v9 save: VMCE_VCPU
(XEN) HVM d2v10 save: VMCE_VCPU
(XEN) HVM d2v11 save: VMCE_VCPU
(XEN) HVM d2v12 save: VMCE_VCPU
(XEN) HVM d2v13 save: VMCE_VCPU
(XEN) HVM d2v14 save: VMCE_VCPU
(XEN) HVM d2v15 save: VMCE_VCPU
(XEN) HVM d2v16 save: VMCE_VCPU
(XEN) HVM d2v17 save: VMCE_VCPU
(XEN) HVM d2v18 save: VMCE_VCPU
(XEN) HVM d2v19 save: VMCE_VCPU
(XEN) HVM d2v20 save: VMCE_VCPU
(XEN) HVM d2v21 save: VMCE_VCPU
(XEN) HVM d2v22 save: VMCE_VCPU
(XEN) HVM d2v23 save: VMCE_VCPU
(XEN) HVM d2v24 save: VMCE_VCPU
(XEN) HVM d2v25 save: VMCE_VCPU
(XEN) HVM d2v26 save: VMCE_VCPU
(XEN) HVM d2v27 save: VMCE_VCPU
(XEN) HVM d2v28 save: VMCE_VCPU
(XEN) HVM d2v29 save: VMCE_VCPU
(XEN) HVM d2v30 save: VMCE_VCPU
(XEN) HVM d2v31 save: VMCE_VCPU
(XEN) HVM d2v0 save: TSC_ADJUST
(XEN) HVM d2v1 save: TSC_ADJUST
(XEN) HVM d2v2 save: TSC_ADJUST
(XEN) HVM d2v3 save: TSC_ADJUST
(XEN) HVM d2v4 save: TSC_ADJUST
(XEN) HVM d2v5 save: TSC_ADJUST
(XEN) HVM d2v6 save: TSC_ADJUST
(XEN) HVM d2v7 save: TSC_ADJUST
(XEN) HVM d2v8 save: TSC_ADJUST
(XEN) HVM d2v9 save: TSC_ADJUST
(XEN) HVM d2v10 save: TSC_ADJUST
(XEN) HVM d2v11 save: TSC_ADJUST
(XEN) HVM d2v12 save: TSC_ADJUST
(XEN) HVM d2v13 save: TSC_ADJUST
(XEN) HVM d2v14 save: TSC_ADJUST
(XEN) HVM d2v15 save: TSC_ADJUST
(XEN) HVM d2v16 save: TSC_ADJUST
(XEN) HVM d2v17 save: TSC_ADJUST
(XEN) HVM d2v18 save: TSC_ADJUST
(XEN) HVM d2v19 save: TSC_ADJUST
(XEN) HVM d2v20 save: TSC_ADJUST
(XEN) HVM d2v21 save: TSC_ADJUST
(XEN) HVM d2v22 save: TSC_ADJUST
(XEN) HVM d2v23 save: TSC_ADJUST
(XEN) HVM d2v24 save: TSC_ADJUST
(XEN) HVM d2v25 save: TSC_ADJUST
(XEN) HVM d2v26 save: TSC_ADJUST
(XEN) HVM d2v27 save: TSC_ADJUST
(XEN) HVM d2v28 save: TSC_ADJUST
(XEN) HVM d2v29 save: TSC_ADJUST
(XEN) HVM d2v30 save: TSC_ADJUST
(XEN) HVM d2v31 save: TSC_ADJUST
(XEN) HVM d2v0 save: CPU_MSR
(XEN) HVM d2v1 save: CPU_MSR
(XEN) HVM d2v2 save: CPU_MSR
(XEN) HVM d2v3 save: CPU_MSR
(XEN) HVM d2v4 save: CPU_MSR
(XEN) HVM d2v5 save: CPU_MSR
(XEN) HVM d2v6 save: CPU_MSR
(XEN) HVM d2v7 save: CPU_MSR
(XEN) HVM d2v8 save: CPU_MSR
(XEN) HVM d2v9 save: CPU_MSR
(XEN) HVM d2v10 save: CPU_MSR
(XEN) HVM d2v11 save: CPU_MSR
(XEN) HVM d2v12 save: CPU_MSR
(XEN) HVM d2v13 save: CPU_MSR
(XEN) HVM d2v14 save: CPU_MSR
(XEN) HVM d2v15 save: CPU_MSR
(XEN) HVM d2v16 save: CPU_MSR
(XEN) HVM d2v17 save: CPU_MSR
(XEN) HVM d2v18 save: CPU_MSR
(XEN) HVM d2v19 save: CPU_MSR
(XEN) HVM d2v20 save: CPU_MSR
(XEN) HVM d2v21 save: CPU_MSR
(XEN) HVM d2v22 save: CPU_MSR
(XEN) HVM d2v23 save: CPU_MSR
(XEN) HVM d2v24 save: CPU_MSR
(XEN) HVM d2v25 save: CPU_MSR
(XEN) HVM d2v26 save: CPU_MSR
(XEN) HVM d2v27 save: CPU_MSR
(XEN) HVM d2v28 save: CPU_MSR
(XEN) HVM d2v29 save: CPU_MSR
(XEN) HVM d2v30 save: CPU_MSR
(XEN) HVM d2v31 save: CPU_MSR
(XEN) HVM2 restore: CPU 0
(XEN) memory_map:add: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:add: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:add: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:add: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:add: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:add: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:add: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:add: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:add: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:add: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:remove: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:remove: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:remove: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:remove: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:remove: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:remove: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:remove: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:remove: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:remove: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:remove: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:add: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:add: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:add: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:add: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:add: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:add: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:add: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:add: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:add: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:add: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:remove: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:remove: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:remove: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:remove: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:remove: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:remove: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:remove: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:remove: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:remove: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:remove: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:add: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:add: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:add: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:add: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:add: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:add: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:add: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:add: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:add: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:add: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:remove: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:remove: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:remove: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:remove: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:remove: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:remove: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:remove: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:remove: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:remove: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:remove: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:add: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:add: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:add: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:add: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:add: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:add: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:add: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:add: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:add: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:add: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:remove: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:remove: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:remove: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:remove: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:remove: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:remove: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:remove: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:remove: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:remove: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:remove: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:add: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:add: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:add: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:add: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:add: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:add: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:add: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:add: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:add: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:add: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:remove: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:remove: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:remove: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:remove: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:remove: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:remove: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:remove: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:remove: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:remove: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:remove: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:add: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:add: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:add: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:add: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:add: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:add: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:add: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:add: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:add: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:add: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:remove: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:remove: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:remove: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:remove: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:remove: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:remove: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:remove: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:remove: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:remove: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:remove: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:add: dom1 gfn=f0000 mfn=383fe8000 nr=2
(XEN) memory_map:add: dom1 gfn=f0003 mfn=383fe8003 nr=7ffd
(XEN) memory_map:add: dom1 gfn=f0043 mfn=383fe8043 nr=7fbd
(XEN) memory_map:add: dom1 gfn=f0083 mfn=383fe8083 nr=7f7d
(XEN) memory_map:add: dom1 gfn=f00c3 mfn=383fe80c3 nr=7f3d
(XEN) memory_map:add: dom1 gfn=f0103 mfn=383fe8103 nr=7efd
(XEN) memory_map:add: dom1 gfn=f0143 mfn=383fe8143 nr=7ebd
(XEN) memory_map:add: dom1 gfn=f0183 mfn=383fe8183 nr=7e7d
(XEN) memory_map:add: dom1 gfn=f01c3 mfn=383fe81c3 nr=7e3d
(XEN) memory_map:add: dom1 gfn=f0800 mfn=383fe8800 nr=7800
(XEN) memory_map:remove: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:remove: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:remove: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:remove: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:remove: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:remove: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:remove: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:remove: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:remove: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:remove: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:add: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:add: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:add: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:add: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:add: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:add: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:add: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:add: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:add: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:add: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:remove: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:remove: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:remove: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:remove: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:remove: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:remove: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:remove: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:remove: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:remove: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:remove: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:add: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:add: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:add: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:add: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:add: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:add: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:add: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:add: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:add: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:add: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:remove: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:remove: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:remove: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:remove: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:remove: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:remove: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:remove: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:remove: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:remove: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:remove: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:add: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:add: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:add: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:add: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:add: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:add: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:add: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:add: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:add: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:add: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:remove: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:remove: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:remove: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:remove: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:remove: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:remove: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:remove: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:remove: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:remove: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:remove: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:add: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:add: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:add: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:add: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:add: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:add: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:add: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:add: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:add: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:add: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:remove: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:remove: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:remove: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:remove: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:remove: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:remove: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:remove: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:remove: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:remove: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:remove: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:add: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:add: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:add: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:add: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:add: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:add: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:add: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:add: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:add: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:add: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:remove: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:remove: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:remove: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:remove: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:remove: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:remove: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:remove: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:remove: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:remove: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:remove: dom2 gfn=f0800 mfn=383fd8800 nr=7800
(XEN) memory_map:add: dom2 gfn=f0000 mfn=383fd8000 nr=2
(XEN) memory_map:add: dom2 gfn=f0003 mfn=383fd8003 nr=7ffd
(XEN) memory_map:add: dom2 gfn=f0043 mfn=383fd8043 nr=7fbd
(XEN) memory_map:add: dom2 gfn=f0083 mfn=383fd8083 nr=7f7d
(XEN) memory_map:add: dom2 gfn=f00c3 mfn=383fd80c3 nr=7f3d
(XEN) memory_map:add: dom2 gfn=f0103 mfn=383fd8103 nr=7efd
(XEN) memory_map:add: dom2 gfn=f0143 mfn=383fd8143 nr=7ebd
(XEN) memory_map:add: dom2 gfn=f0183 mfn=383fd8183 nr=7e7d
(XEN) memory_map:add: dom2 gfn=f01c3 mfn=383fd81c3 nr=7e3d
(XEN) memory_map:add: dom2 gfn=f0800 mfn=383fd8800 nr=7800