From 2d1bd9c15e605136c7817fe824a7c429cbfb137d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?=
 <marmarek@xxxxxxxxxxxxxxxxxxxxxx>
Date: Tue, 7 Apr 2026 13:55:41 +0200
Subject: [PATCH] DEBUG TSC

---
 xen/arch/x86/cpu/intel.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 51a3d1c4b5f3..846c6a704a3f 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -4,6 +4,7 @@
 #include <xen/sched.h>
 #include <xen/smp.h>
 #include <xen/string.h>
+#include <xen/keyhandler.h>
 
 #include <asm/apic.h>
 #include <asm/i387.h>
@@ -675,3 +676,30 @@ void __init intel_init_arat(void)
     if ( opt_arat && cpu_has_arat )
         setup_force_cpu_cap(X86_FEATURE_XEN_ARAT);
 }
+
+static void cf_check debug_tsc(unsigned char key)
+{
+    uint64_t val;
+    int msr_idx[] = { 0x10,         // TSC
+                      0x3b,         // TSC_ADJUST
+                      0xc0000103,   // TSC_AUX
+                      0xc0000104,   // TSC_RATIO
+                      0x06e0,       // TSC_DEADLINE
+                      0xe7,         // MPERF
+                      0xe8,         // APERF
+                      0x64e,        // PPERF
+                      0 };
+
+    for ( int i = 0; msr_idx[i]; i++ )
+    {
+        if ( !rdmsr_safe(msr_idx[i], &val) )
+            printk("MSR %08x: %016lx\n", msr_idx[i], val);
+    }
+}
+
+static int __init cf_check register_debug_tsc(void)
+{
+    register_keyhandler('1', debug_tsc, "Extra TSC debug", false);
+    return 0;
+}
+__initcall(register_debug_tsc);
-- 
2.53.0