RE: [Xen-ia64-devel] RE: rid virtualization

["Magenheimer, Dan (HP Labs Fort Collins)" <dan.magenheimer@xxxxxx>]

> I think the ideal mangling function would be to reverse the bottom n
> bits of the RID, where n is the number of bits used in the hash (and
> depends on the VHPT size).  Thus consecutive RIDs would result in
> accessing diametrically opposite portions of the VHPT, while 
> consecutive
> VPNs achieve cache locality within the halves.  Further apart 
> processes
> would be progressively more likely to collide, but are also 
> less likely
> to be communicating.
> 
> Unfortunately, Itanium doesn't provide bit-reversal 
> instructions, which
> is why in the Linux long VHPT work I decided to just do 
> byte-reversal on
> the bottom n/8 bytes, to approximate this bit-reversal.  For typical
> VHPT sizes n/8 is around 2.
> 
> Obviously one could write functions that better approximate bit-
> reversal, in the extreme case using a lookup table for each byte or
> nibble, though I'm not sure whether that's worthwhile.

Jim Hull, HP's super-guru on the Itanium instruction set, provided
me with the attached functions (C and assembly) that bit-reverse
a full 64-bit register in 14 cycles.  Perhaps someone would like
to play with this to adapt it to a smaller number of bits?

Dan

Attachment: bitrev64C.c
Description: bitrev64C.c

Attachment: bitrev64.s
Description: bitrev64.s

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