RE: [Xen-ia64-devel] RE: [PATCH] Patch to make latesthgmulti-domainback to work

["Magenheimer, Dan (HP Labs Fort Collins)" <dan.magenheimer@xxxxxx>]

> >>The problem (PL2 vs PL0) still occurs even with
> >>that code turned off.
> >
> >When you disable FAST_PTC_GA, it then goes to vcpu_ptc_ga which still
> >only handle vcpu->arch.dtlb, without touching vcpu->arch.dtlb_pte. In
> >this case, once match_dtlb begins to return guest pte in my patch, it
> >may contain stale value since dtlb_pte is not handled in vcpu_ptc_ga.
> >
> 
> So what I really mean here is that you should purge dtlb_pte/itlb_pte
> (guest pte entry) in vcpu_ptc_ga and hyper_ptc_ga.

I'm not sure I understand.  arch.dtlb_pte is just some data associated
with arch.dtlb.  It gets set whenever arch.dtlb gets set and it
only gets used if arch.dtlb matches and is valid.  IIRC, its only
use is to save away the metaphysical address so vcpu_tpa (and IIRC,
indirectly, vcpu_fc?) is guaranteed to be able to find it. So what
do you mean by "purge dtlb_pte"?

Some more information... when the bug occurs, trp->page_flags and
vcpu->arch.dtlb_pte always seem to be identical except for the upper
PL bit.  That's what I would expect for domain0, but it does
indicate that dtlb_pte doesn't have some stale value.

Good night!
Dan

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