Re: [Xen-ia64-devel] VTD is coming

[Isaku Yamahata <yamahata@xxxxxxxxxxxxx>]

On Fri, May 11, 2007 at 10:44:48AM +0800, Xu, Anthony wrote:

> >Do you mean nexted page table(NPT) by 'processor page table'?
> Processor page table refers to shadow page table which is used to emulate 
> guest 
> page table, this is not related to NPT.

I meant EPT(Extended Page tables) in Intel terminology.
Probably I need to read VT-d spec more carefully.


> >ia32 VT-d code would be very specific to ia32 so that
> >it seems very difficult to have arch generic code.
> >It would be reasonable to go for ia64 specific VT-d implementation.
> 
> Yes, we need to prepare for VTD/IPF,
> I think the first step is to change P2M to vtd page table format.
> P2M is related to several components inside XEN, it might take a while,
> It is better, if this can be done earlier.

VT-d spec says only 4bits in vtd page table entry are avilable
for software . On the other hand we're using many bits more than 4.
So at this moment I'm not sure which is better to unify P2M
with VT-d table or to have separated tables.
Anyhow, it would be necessary to make P2M VT-d friendly somehow.


> Then we can leverage code from IA32 as possible, after vtd/ia32 code is 
> checked 
> in. I think we can reuse most of the code, especially the codes in qemu and 
> control
> panel.
> 
> Finally, we can debug vtd code when VTD/IPF platform is present.

Sounds reasonable.
-- 
yamahata

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