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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-ia64-devel] [PATCH] fix wrong insertion of TLB entry in region 0
Quoting Kouya Shimura <kouya@xxxxxxxxxxxxxx>: > Hi Tristan, > > vcpu->arch.metaphysical_saved_rr0 is the mangled version of rr[0]. > The difference of this patch is whether the machine rr is set or not. Thank you for the details. Your patch will also makes things clearer. Good catch! Tristan. _______________________________________________ Xen-ia64-devel mailing list Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-ia64-devel
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