[Xen-ia64-devel] [patch 03/12] ia64: kexec: Unpin the correct VHPT TR in ia64_do_tlb_purge

[Simon Horman <horms@xxxxxxxxxxxx>]

When ia64_do_tlb_purge is called indrectly from play_dead()
GET_VA_VCPU_VHPT_MADDR(r2,r3) does not give the value of the VHPT
pinned into the TLB. I believe that this is because
current is changed between pinning and calling play_dead,
though I am not sure of the exact scemantics.

In any case, by recording the pinned value in a percpu variable,
and unpinning this value, the TR entry is removed and all is well.

Cc: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
Signed-off-by: Simon Horman <horms@xxxxxxxxxxxx>

--- 

Mon, 21 Apr 2008 11:50:41 +1000
* Also save the vhpt when it is set in vmx_load_all_rr()
  and vmx_vcpu_set_rr()

Index: xen-unstable.hg/xen/arch/ia64/linux-xen/mca_asm.S
===================================================================
--- xen-unstable.hg.orig/xen/arch/ia64/linux-xen/mca_asm.S      2008-04-21 
11:53:31.000000000 +1000
+++ xen-unstable.hg/xen/arch/ia64/linux-xen/mca_asm.S   2008-04-21 
11:53:45.000000000 +1000
@@ -322,7 +322,9 @@ ia64_do_tlb_purge:
 #ifdef XEN
        // 5. VHPT
 #if VHPT_ENABLED
-       GET_VA_VCPU_VHPT_MADDR(r2,r3);;
+       // GET_VA_VCPU_VHPT_MADDR() may not give the
+       // value of the VHPT currently pinned into the TLB
+       GET_THIS_PADDR(r2, inserted_vhpt);;
        dep r16=0,r2,0,IA64_GRANULE_SHIFT
        mov r18=IA64_GRANULE_SHIFT<<2
        ;;
Index: xen-unstable.hg/xen/arch/ia64/xen/regionreg.c
===================================================================
--- xen-unstable.hg.orig/xen/arch/ia64/xen/regionreg.c  2008-04-21 
11:53:31.000000000 +1000
+++ xen-unstable.hg/xen/arch/ia64/xen/regionreg.c       2008-04-21 
11:53:45.000000000 +1000
@@ -15,6 +15,7 @@
 #include <asm/regionreg.h>
 #include <asm/vhpt.h>
 #include <asm/vcpu.h>
+#include <asm/percpu.h>
 
 /* Defined in xemasm.S  */
 extern void ia64_new_rr7(unsigned long rid, void *shared_info, void 
*shared_arch_info, unsigned long shared_info_va, unsigned long va_vhpt);
@@ -227,6 +228,10 @@ set_rr(unsigned long rr, unsigned long r
        ia64_srlz_d();
 }
 
+#if VHPT_ENABLED
+DEFINE_PER_CPU(unsigned long, inserted_vhpt);
+#endif
+
 // validates and changes a single region register
 // in the currently executing domain
 // Passing a value of -1 is a (successful) no-op
@@ -260,6 +265,9 @@ int set_one_rr(unsigned long rr, unsigne
                if (!PSCB(v,metaphysical_mode))
                        set_rr(rr,newrrv.rrval);
        } else if (rreg == 7) {
+#if VHPT_ENABLED
+               __get_cpu_var(inserted_vhpt) = __va_ul(vcpu_vhpt_maddr(v));
+#endif
                ia64_new_rr7(vmMangleRID(newrrv.rrval),v->domain->shared_info,
                             v->arch.privregs, v->domain->arch.shared_info_va,
                             __va_ul(vcpu_vhpt_maddr(v)));
Index: xen-unstable.hg/xen/arch/ia64/vmx/vmx_phy_mode.c
===================================================================
--- xen-unstable.hg.orig/xen/arch/ia64/vmx/vmx_phy_mode.c       2008-04-21 
11:53:31.000000000 +1000
+++ xen-unstable.hg/xen/arch/ia64/vmx/vmx_phy_mode.c    2008-04-21 
11:53:42.000000000 +1000
@@ -171,6 +171,9 @@ vmx_load_all_rr(VCPU *vcpu)
        ia64_dv_serialize_data();
        ia64_set_rr((VRN6 << VRN_SHIFT), vrrtomrr(vcpu, VMX(vcpu, vrr[VRN6])));
        ia64_dv_serialize_data();
+#if VHPT_ENABLED
+        __get_cpu_var(inserted_vhpt) = __va_ul(vcpu_vhpt_maddr(v));
+#endif
        vmx_switch_rr7(vrrtomrr(vcpu,VMX(vcpu, vrr[VRN7])),
                       (void *)vcpu->arch.vhpt.hash,
                       pal_vaddr, vcpu->arch.privregs);
Index: xen-unstable.hg/xen/arch/ia64/vmx/vmx_vcpu.c
===================================================================
--- xen-unstable.hg.orig/xen/arch/ia64/vmx/vmx_vcpu.c   2008-04-21 
11:53:31.000000000 +1000
+++ xen-unstable.hg/xen/arch/ia64/vmx/vmx_vcpu.c        2008-04-21 
11:54:07.000000000 +1000
@@ -180,9 +180,13 @@ IA64FAULT vmx_vcpu_set_rr(VCPU *vcpu, u6
     VMX(vcpu,vrr[reg>>VRN_SHIFT]) = val;
     switch((u64)(reg>>VRN_SHIFT)) {
     case VRN7:
-        if (likely(vcpu == current))
+        if (likely(vcpu == current)) {
+#if VHPT_ENABLED
+            __get_cpu_var(inserted_vhpt) = __va_ul(vcpu_vhpt_maddr(v));
+#endif
             vmx_switch_rr7(vrrtomrr(vcpu,val), (void *)vcpu->arch.vhpt.hash,
                            pal_vaddr, vcpu->arch.privregs);
+        }
        break;
     case VRN4:
         rrval = vrrtomrr(vcpu,val);
Index: xen-unstable.hg/xen/include/asm-ia64/regionreg.h
===================================================================
--- xen-unstable.hg.orig/xen/include/asm-ia64/regionreg.h       2008-04-21 
11:53:31.000000000 +1000
+++ xen-unstable.hg/xen/include/asm-ia64/regionreg.h    2008-04-21 
11:53:42.000000000 +1000
@@ -36,6 +36,7 @@ typedef union ia64_rr {
 #define RR_RID(arg)     (((arg) & 0x0000000000ffffff) << 8)
 #define RR_RID_MASK     0x00000000ffffff00L
 
+DECLARE_PER_CPU(unsigned long, inserted_vhpt);
 
 int set_one_rr(unsigned long rr, unsigned long val);
 

-- 

-- 
Horms


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