[Xen-ia64-devel] mca handler

[Isaku Yamahata <yamahata@xxxxxxxxxxxxx>]

Hi.
While I was debugging kexec/kdump, I have a question about the mca
handler. I cited the related hunks below. Could you please clarify them?

On mca the firmware saves non-banked and banked general registers
and the most of ar registers must be unchanged.
However before ia64_os_mca_proc_state_dump saves such registers,
the cited hunks unconditionally overwrite ar.k[36] so that
they are destroyed. Am I missing anything?


changeset:   12447:2afdc0066df6
user:        awilliam@xxxxxxxxxxx
date:        Sun Oct 29 09:27:11 2006 -0700
files:       xen/arch/ia64/linux-xen/mca_asm.S
description:
[IA64] MCA support - Add percpu data physical addr mca_asm.S

Signed-off-by: Yutaka Ezaki <yutaka.ezaki@xxxxxxxxxxxxxx>
Signed-off-by: Masaki Kanno <kanno.masaki@xxxxxxxxxxxxxx>
Signed-off-by: Kazuhiro Suzuki <kaz@xxxxxxxxxxxxxx>
...
...
@@ -132,7 +153,40 @@
        .text
        .align 16
 
-#ifndef XEN
+#ifdef XEN
+/*
+ * void set_per_cpu_data(void)
+ * {
+ *   int i;
+ *   for (i = 0; i < 64; i++) {
+ *     if (ia64_mca_tlb_list[i].cr_lid == ia64_getreg(_IA64_REG_CR_LID)) {
+ *       ia64_set_kr(IA64_KR_PER_CPU_DATA, ia64_mca_tlb_list[i].percpu_paddr);
+ *       return;
+ *     }
+ *   }
+ *   while(1); // Endless loop on error
+ * }
+ */
+#define SET_PER_CPU_DATA()                                     \
+       LOAD_PHYSICAL(p0,r2,ia64_mca_tlb_list);;                \
+       mov r7 = r0;                                            \
+       mov r6 = r0;;                                           \
+       adds r3 = IA64_MCA_PERCPU_OFFSET, r2;                   \
+1:     add r4 = r6, r2;                                        \
+       mov r5=cr.lid;;                                         \
+       adds r7 = 1, r7;                                        \
+       ld8 r4 = [r4];;                                         \
+       cmp.ne p6, p7 = r5, r4;                                 \
+       cmp4.lt p8, p9 = NR_CPUS-1, r7;                         \
+(p7)   br.cond.dpnt 3f;                                        \
+       adds r6 = 16, r6;                                       \
+(p9)   br.cond.sptk 1b;                                        \
+2:     br 2b;;                 /* Endless loop on error */     \
+3:     add r4 = r6, r3;;                                       \
+       ld8 r4 = [r4];;                                         \
+       mov ar.k3=r4
+#endif /* XEN */
+
...
@@ -235,6 +327,9 @@
        cmp.ne  p6,p0=r4,r0
 (p6)   br ia64_os_mca_spin
 
+#ifdef XEN
+       SET_PER_CPU_DATA();;
+#endif
        // Save the SAL to OS MCA handoff state as defined
        // by SAL SPEC 3.0
        // NOTE : The order in which the state gets saved
@@ -250,7 +345,19 @@
 
 ia64_os_mca_done_dump:
 
+#ifdef XEN
+       // Set current to ar.k6
+       GET_THIS_PADDR(r2,cpu_kr);;
+       add r2=IA64_KR_CURRENT_OFFSET,r2;;
+       ld8 r2=[r2];;
+       mov ar.k6=r2;;
+
+       GET_THIS_PADDR(r2,ia64_sal_to_os_handoff_state_addr);;
+       ld8 r2=[r2];;
+       adds r16=56,r2
+#else
        LOAD_PHYSICAL(p0,r16,ia64_sal_to_os_handoff_state+56)
+#endif
        ;;
        ld8 r18=[r16]           // Get processor state parameter on existing PA
LE_CHECK.
        ;;
...
@@ -874,12 +1003,6 @@
        br      ia64_os_mca_done_restore;;
 
 //EndStub/////////////////////////////////////////////////////////////////////
/
-#else
-ia64_os_mca_dispatch:
-1:
-       br.sptk 1b
-ia64_os_mca_dispatch_end:
-#endif /* !XEN */
 
 
 // ok, the issue here is that we need to save state information so
@@ -911,6 +1034,15 @@
 
 GLOBAL_ENTRY(ia64_monarch_init_handler)
        .prologue
+#ifdef XEN     /* Need in ia64_monarch_init_handler? */
+       SET_PER_CPU_DATA();;
+
+       // Set current to ar.k6
+       GET_THIS_PADDR(r2,cpu_kr);;
+       add r2=IA64_KR_CURRENT_OFFSET,r2;;
+       ld8 r2=[r2];;
+       mov ar.k6=r2;;
+#endif
        // stash the information the SAL passed to os
        SAL_TO_OS_MCA_HANDOFF_STATE_SAVE(r2)
        ;;



-- 
yamahata

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