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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [XenPPC] [xenppc-unstable] [ppc] fix interrupt disabling in exceptions.S
# HG changeset patch
# User Hollis Blanchard <hollisb@xxxxxxxxxx>
# Node ID 93e69598bbc8fbf05156397c73e09887697485ad
# Parent 1bb8eff867204b362e5e4aa018432959b4f64930
[ppc] fix interrupt disabling in exceptions.S
- some assembly incorrectly assumed MSR:EE was already off.
- remove ppc_do_softirq hack by manually saving/restoring a couple
nonvolatiles.
- use extended form of mtmsrd to save a couple instructions. (Plenty of room
for optimization remains in exceptions.S...)
Signed-off-by: Hollis Blanchard <hollisb@xxxxxxxxxx>
---
xen/arch/ppc/exceptions.c | 7 ---
xen/arch/ppc/exceptions.h | 1
xen/arch/ppc/external.c | 3 -
xen/arch/ppc/ppc64/exceptions.S | 71 ++++++++++++++++++----------------------
4 files changed, 34 insertions(+), 48 deletions(-)
diff -r 1bb8eff86720 -r 93e69598bbc8 xen/arch/ppc/exceptions.c
--- a/xen/arch/ppc/exceptions.c Thu Jun 08 17:20:11 2006 -0400
+++ b/xen/arch/ppc/exceptions.c Thu Jun 08 16:38:31 2006 -0500
@@ -33,13 +33,6 @@ extern void program_exception(struct cpu
extern void program_exception(struct cpu_user_regs *regs, unsigned long
cookie);
int hdec_sample = 0;
-
-/* XXX fix test_all_events not to need this hack */
-ulong ppc_do_softirq(ulong orig_msr)
-{
- do_softirq();
- return orig_msr;
-}
void do_timer(struct cpu_user_regs *regs)
{
diff -r 1bb8eff86720 -r 93e69598bbc8 xen/arch/ppc/exceptions.h
--- a/xen/arch/ppc/exceptions.h Thu Jun 08 17:20:11 2006 -0400
+++ b/xen/arch/ppc/exceptions.h Thu Jun 08 16:38:31 2006 -0500
@@ -18,7 +18,6 @@ extern void __start_xen_ppc(
ulong r3, ulong r4, ulong r5, ulong r6, ulong r7, ulong orig_msr);
extern multiboot_info_t *boot_of_init(ulong r3, ulong r4, ulong vec, ulong
r6, ulong r7, ulong orig_msr);
-extern ulong ppc_do_softirq(ulong orig_msr);
extern void do_timer(struct cpu_user_regs *regs);
extern void do_dec(struct cpu_user_regs *regs);
extern void program_exception(
diff -r 1bb8eff86720 -r 93e69598bbc8 xen/arch/ppc/external.c
--- a/xen/arch/ppc/external.c Thu Jun 08 17:20:11 2006 -0400
+++ b/xen/arch/ppc/external.c Thu Jun 08 16:38:31 2006 -0500
@@ -50,8 +50,7 @@ void deliver_ee(struct cpu_user_regs *re
MSR_RI |
MSR_BE | MSR_FP | MSR_PMM | MSR_PR | MSR_SE);
-
- local_irq_disable();
+ BUG_ON(mfmsr() & MSR_EE);
/* trigger exception only if we have a pending irq, we're resuming a guest
* (not the hypervisor), the guest is dom0, and it has MSR:EE set. */
diff -r 1bb8eff86720 -r 93e69598bbc8 xen/arch/ppc/ppc64/exceptions.S
--- a/xen/arch/ppc/ppc64/exceptions.S Thu Jun 08 17:20:11 2006 -0400
+++ b/xen/arch/ppc/ppc64/exceptions.S Thu Jun 08 16:38:31 2006 -0500
@@ -304,11 +304,10 @@ exception_vectors_end:
ld r0, UREGS_ctr(r1)
mtctr r0
- /* clear MSR:RI to set SRR0/SRR1 */
+ /* clear MSR:RI/EE to set SRR0/SRR1 */
mfmsr r0
- li r13, MSR_RI
- andc r0, r0, r13
- mtmsrd r0
+ li r13, 0
+ mtmsrd r0, 1
ld r0, UREGS_pc(r1)
mtspr SPRN_HSRR0, r0
@@ -367,9 +366,14 @@ ex_hcall_continued:
LOADADDR r12, do_hcall
mr r3, r1 /* pass pointer to cpu_user_regs */
subi r1, r1, STACK_FRAME_OVERHEAD /* make a "caller" stack frame */
- CALL_CFUNC r12
+ CALL_CFUNC r12 /* call hcall handler */
+
/* test for pending softirqs, and loop until there are no more. */
+ mfmsr r14
+ ori r14, r14, MSR_EE
+ xori r15, r14, MSR_EE
hcall_test_all_events:
+ mtmsrd r15, 1 /* disable interrupts */
ld r3, PAREA_vcpu(r13)
lwz r3, VCPU_processor(r3)
LOADADDR r4, irq_stat
@@ -377,22 +381,16 @@ hcall_test_all_events:
add r4, r3, r4
ld r5, IRQSTAT_pending(r4)
cmpldi r5, 0
- beq hcall_out
-
- /* we could use nonvolatile GPRs across do_softirq calls, but those are
- * volatile across exceptions :( */
- LOADADDR r6, ppc_do_softirq
- mfmsr r3 /* we pass this MSR to _do_softirq so
- * it can give it to us back without
- * having to save it */
- ori r8, r3, MSR_EE
-
- mtmsrd r8 /* enable interrupts */
- CALL_CFUNC r6 /* process softirqs returns r3 */
- mtmsrd r3 /* disable interrupts */
- b hcall_test_all_events /* look for more */
-hcall_out:
+ beq hcall_out /* no more softirqs; exit loop */
+
+ LOADADDR r6, do_softirq
+ mtmsrd r14, 1 /* enable interrupts */
+ CALL_CFUNC r6 /* process softirqs */
+ b hcall_test_all_events /* look for more */
+
+hcall_out:
addi r1, r1, STACK_FRAME_OVERHEAD /* restore stack to cpu_user_regs */
+ LOAD_GPRS r14, r15, r1 /* we clobbered r14/r15 */
b fast_resume
@@ -423,7 +421,11 @@ ex_hdec_continued:
bne hdec_out
/* test for pending softirqs, and loop until there are no more. */
+ mfmsr r14
+ ori r14, r14, MSR_EE
+ xori r15, r14, MSR_EE
test_all_events:
+ mtmsrd r15, 1 /* disable interrupts */
ld r3, PAREA_vcpu(r13)
lwz r3, VCPU_processor(r3)
LOADADDR r4, irq_stat
@@ -431,36 +433,29 @@ test_all_events:
add r4, r3, r4
ld r5, IRQSTAT_pending(r4)
cmpldi r5, 0
- beq hdec_out
-
- /* we could use nonvolatile GPRs across do_softirq calls, but those are
- * volatile across exceptions :( */
- LOADADDR r6, ppc_do_softirq
- mfmsr r3 /* we pass this MSR to _do_softirq so
- * it can give it to us back without
- * having to save it */
- ori r8, r3, MSR_EE
-
- mtmsrd r8 /* enable interrupts */
- CALL_CFUNC r6 /* process softirqs returns r3 */
- mtmsrd r3 /* disable interrupts */
+ beq hdec_out /* no more softirqs; exit loop */
+
+ LOADADDR r6, do_softirq
+ mtmsrd r14, 1 /* enable interrupts */
+ CALL_CFUNC r6 /* process softirqs */
b test_all_events /* look for more */
hdec_out:
addi r1, r1, STACK_FRAME_OVERHEAD /* restore stack to cpu_user_regs */
+ LOAD_GPRS r14, r15, r1 /* we clobbered r14/r15 in the loop */
/* r1 points to the to-be-restored cpu_user_regs. These could be mid-hypervisor
* stack (returning into elsewhere in Xen) or at the top of the stack
* (restoring the domain). */
_GLOBAL(full_resume)
- /* disable MSR:EE, since we got here from inside do_softirq() */
+ /* disable MSR:EE, since we could have come from do_softirq() */
mfmsr r7
- li r8, 0
- ori r8, r8, MSR_EE
- andc r7, r7, r8
- mtmsrd r7
+ ori r7, r7, MSR_EE
+ xori r7, r7, MSR_EE
+ mtmsrd r7, 1
LOAD_GPRS r14, r31, r1 /* restore all non-volatiles */
+
fast_resume:
ld r10, UREGS_msr(r1)
rldicl. r11, r10, 4, 63 /* test SRR1:HV */
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