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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [XenPPC][Patch 3/3] xen patches for xm save/restore
diff -r 9148f7816d00 xen/include/asm-powerpc/domain.h
--- a/xen/include/asm-powerpc/domain.h Tue Oct 24 19:11:00 2006 -0400
+++ b/xen/include/asm-powerpc/domain.h Wed Nov 01 10:24:30 2006 -0500
@@ -48,10 +48,6 @@ struct arch_domain {
uint large_page_order[4];
} __cacheline_aligned;
-struct slb_entry {
- ulong slb_vsid;
- ulong slb_esid;
-};
#define SLB_ESID_VALID (1ULL << (63 - 36))
#define SLB_ESID_CLASS (1ULL << (63 - 56))
#define SLB_ESID_MASK (~0ULL << (63 - 35))
@@ -60,9 +56,9 @@ struct slb_entry {
struct xencomm;
-typedef struct {
- u32 u[4];
-} __attribute__((aligned(16))) vector128;
+#ifdef HAS_VMX
+typedef _vector128 vector128;
+#endif /* HAS_VMX */
struct arch_vcpu {
cpu_user_regs_t ctxt; /* User-level CPU registers */
diff -r 9148f7816d00 xen/include/asm-powerpc/htab.h
--- a/xen/include/asm-powerpc/htab.h Tue Oct 24 19:11:00 2006 -0400
+++ b/xen/include/asm-powerpc/htab.h Wed Nov 01 10:25:29 2006 -0500
@@ -69,68 +69,68 @@
union pte {
struct pte_words {
- ulong vsid;
- ulong rpn;
+ uint64_t vsid;
+ uint64_t rpn;
} words;
struct pte_bits {
/* *INDENT-OFF* */
/* high word */
- ulong avpn: 57; /* [0-56] abbreviated virtual page number */
- ulong lock: 1; /* [57] hypervisor lock bit */
- ulong res: 1; /* [58] reserved for hypervisor */
- ulong bolted: 1; /* [59] XXX software-reserved; temp hack */
- ulong sw: 1; /* [60] reserved for software */
- ulong l: 1; /* [61] Large Page */
- ulong h: 1; /* [62] hash function id */
- ulong v: 1; /* [63] valid */
+ uint64_t avpn: 57; /* [0-56] abbreviated virtual page number */
+ uint64_t lock: 1; /* [57] hypervisor lock bit */
+ uint64_t res: 1; /* [58] reserved for hypervisor */
+ uint64_t bolted: 1; /* [59] XXX software-reserved; temp hack */
+ uint64_t sw: 1; /* [60] reserved for software */
+ uint64_t l: 1; /* [61] Large Page */
+ uint64_t h: 1; /* [62] hash function id */
+ uint64_t v: 1; /* [63] valid */
/* low word */
- ulong pp0: 1; /* [0] page protection bit 0 (current PowerPC
+ uint64_t pp0: 1; /* [0] page protection bit 0 (current PowerPC
* specification says it can always be 0) */
- ulong ts: 1; /* [1] tag select */
- ulong rpn: 50; /* [2-51] real page number */
- ulong res2: 2; /* [52,53] reserved */
- ulong ac: 1; /* [54] address compare */
- ulong r: 1; /* [55] referenced */
- ulong c: 1; /* [56] changed */
- ulong w: 1; /* [57] write through */
- ulong i: 1; /* [58] cache inhibited */
- ulong m: 1; /* [59] memory coherent */
- ulong g: 1; /* [60] guarded */
- ulong n: 1; /* [61] no-execute */
- ulong pp1: 2; /* [62,63] page protection bits 1:2 */
+ uint64_t ts: 1; /* [1] tag select */
+ uint64_t rpn: 50; /* [2-51] real page number */
+ uint64_t res2: 2; /* [52,53] reserved */
+ uint64_t ac: 1; /* [54] address compare */
+ uint64_t r: 1; /* [55] referenced */
+ uint64_t c: 1; /* [56] changed */
+ uint64_t w: 1; /* [57] write through */
+ uint64_t i: 1; /* [58] cache inhibited */
+ uint64_t m: 1; /* [59] memory coherent */
+ uint64_t g: 1; /* [60] guarded */
+ uint64_t n: 1; /* [61] no-execute */
+ uint64_t pp1: 2; /* [62,63] page protection bits 1:2 */
/* *INDENT-ON* */
} bits;
};
union ptel {
- ulong word;
+ uint64_t word;
struct ptel_bits {
/* *INDENT-OFF* */
- ulong pp0: 1; /* page protection bit 0 (current PPC
+ uint64_t pp0: 1; /* page protection bit 0 (current PPC
* AS says it can always be 0) */
- ulong ts: 1; /* tag select */
- ulong rpn: 50; /* real page number */
- ulong res2: 2; /* reserved */
- ulong ac: 1; /* address compare */
- ulong r: 1; /* referenced */
- ulong c: 1; /* changed */
- ulong w: 1; /* write through */
- ulong i: 1; /* cache inhibited */
- ulong m: 1; /* memory coherent */
- ulong g: 1; /* guarded */
- ulong n: 1; /* no-execute */
- ulong pp1: 2; /* page protection bits 1:2 */
+ uint64_t ts: 1; /* tag select */
+ uint64_t rpn: 50; /* real page number */
+ uint64_t res2: 2; /* reserved */
+ uint64_t ac: 1; /* address compare */
+ uint64_t r: 1; /* referenced */
+ uint64_t c: 1; /* changed */
+ uint64_t w: 1; /* write through */
+ uint64_t i: 1; /* cache inhibited */
+ uint64_t m: 1; /* memory coherent */
+ uint64_t g: 1; /* guarded */
+ uint64_t n: 1; /* no-execute */
+ uint64_t pp1: 2; /* page protection bits 1:2 */
/* *INDENT-ON* */
} bits;
};
struct domain_htab {
- ulong sdr1;
+ uint64_t sdr1;
uint log_num_ptes; /* log number of PTEs in HTAB. */
uint order; /* order for freeing. */
union pte *map; /* access the htab like an array */
- ulong *shadow; /* idx -> logical translation array */
+ uint64_t *shadow; /* idx -> logical translation array */
};
#endif
diff -r 9148f7816d00 xen/include/public/arch-powerpc.h
--- a/xen/include/public/arch-powerpc.h Tue Oct 24 19:11:00 2006 -0400
+++ b/xen/include/public/arch-powerpc.h Wed Nov 01 16:13:14 2006 -0500
@@ -94,11 +94,66 @@ typedef struct cpu_user_regs cpu_user_re
typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ /* XXX timebase */
+#define NUM_SLB_ENTRIES 64
+struct slb_entry {
+ uint64_t slb_vsid;
+ uint64_t slb_esid;
+};
+typedef struct slb_entry slb_entry_t;
+
+#ifndef HAS_VMX
+#define HAS_VMX 1
+#endif
+
+#ifndef HAS_FLOAT
+#define HAS_FLOAT 1
+#endif
+
+#ifdef HAS_VMX
+typedef struct {
+ uint32_t u[4];
+} __attribute__((aligned(16))) _vector128;
+#endif /* HAS_VMX */
+
+
/* ONLY used to communicate with dom0! See also struct exec_domain. */
struct vcpu_guest_context {
cpu_user_regs_t user_regs; /* User-level CPU registers */
+ slb_entry_t slb_entries[NUM_SLB_ENTRIES]; /* Segment
Lookaside Buffer */
+
+ /* Special-Purpose Registers */
+ uint64_t sprg[4];
+ uint64_t timebase;
+ uint64_t dar;
+ uint64_t dsisr;
+
+ struct cpu_vcpu_tag {
+ uint64_t hid4;
+ } cpu; /* CPU-specific bits */
+
+ uint32_t dec;
+
+ /* XXX etc */
+#ifdef HAS_FLOAT
+#define NUM_FPRS 32
+ double fprs[NUM_FPRS];
+#endif
+#ifdef HAS_VMX
+ _vector128 vrs[32];
+ _vector128 vscr;
+ uint32_t vrsave;
+#endif
+
+#if 0
+ struct xencomm *xencomm;
+
+ /* I/O-port access bitmap. */
+ u8 *iobmp; /* Guest kernel virtual address of the bitmap. */
+ int iobmp_limit; /* Number of ports represented in the bitmap. */
+ int iopl; /* Current IOPL for this VCPU. */
+#endif
+
uint64_t sdr1; /* Pagetable base */
- /* XXX etc */
};
typedef struct vcpu_guest_context vcpu_guest_context_t;
DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
diff -r 9148f7816d00 xen/include/public/domctl.h
--- a/xen/include/public/domctl.h Tue Oct 24 19:11:00 2006 -0400
+++ b/xen/include/public/domctl.h Wed Nov 01 10:30:07 2006 -0500
@@ -354,6 +354,17 @@ struct xen_domctl_real_mode_area {
};
typedef struct xen_domctl_real_mode_area xen_domctl_real_mode_area_t;
DEFINE_XEN_GUEST_HANDLE(xen_domctl_real_mode_area_t);
+
+#define XEN_DOMCTL_getshadowlist 29
+struct xen_domctl_getshadowlist {
+ /* OUT variables */
+ /* Start of htab array */
+ uint64_t htab_map;
+ /* Number of ptes within htab */
+ uint32_t htab_num_ptes;
+};
+typedef struct xen_domctl_getshadowlist xen_domctl_getshadowlist_t;
+DEFINE_XEN_GUEST_HANDLE(xen_domctl_getshadowlist_t);
struct xen_domctl {
uint32_t cmd;
@@ -381,6 +392,7 @@ struct xen_domctl {
struct xen_domctl_arch_setup arch_setup;
struct xen_domctl_settimeoffset settimeoffset;
struct xen_domctl_real_mode_area real_mode_area;
+ struct xen_domctl_getshadowlist getshadowlist;
uint8_t pad[128];
} u;
};
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