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Re: [XenPPC] [PATCH] Disable DPM until code is audited



Most JS20 and JS21 have DPM disabled on the board,

What does this mean?  SLOF/js2x enables DPM always, for
example; there is no hardware override that I'm aware of.

According to S9.9 of 970FX UM:
Dynamic power management can be disabled in the RAS units by asserting bit[0]
  in the JTAG register with modifier address 0x000800.

Oh okay, that's not a *hardware* disable.  Well could be that
it's enabled on JS2x, I dunno.

which is why we have not seen any SMP problems with them. However the Maple-D and the JS20 model Amos cites both have had problems with the one of these two modes. That model seems to be the newest JS20 we've run on.

Sounds like the problem manifests itself on all 970FX and
no other CPUs from the 970 family.

I was under the impression that we had other 970FX js20s but perhaps we do not

The 2.2GHz ones are 970FX, the 1.6GHz ones are not.

My question remains: did you try with NAP disabled and
DPM enabled?

I see, so:
  HID0[NAP]=1
  HID0[DPM]=1
  MSR[POW]=1

is NAP and is different than:
  HID0[NAP]=0
  HID0[DPM]=1
  MSR[POW]=1
which is something else?

NAP=0 DPM=1 POW=whatever is what I was after.

DPM is not a power-down mode; it's just (fine-grained) clock
gating AFAIK, it shouldn't make anything slower ever.

Sure I'll try that.

Thanks!


Segher


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