Re: [Embedded-pv-devel] Xen RAM entry

[Andrii Anisov <andrii.anisov@xxxxxxxxx>]

Hello Ramya,

Yep, I forgot the TI's SoCs have crossbar. It's my bad.
Actually the TI's crossbar configuration in kernel appeared not so
long ago (about 2 years ago) contradicts with the XEN hypervisor
approach.
In systems with XEN all HW interrupts are taken by XEN and then
injected into a domain this interrupt is assigned. This is configured
at the moment XEN parses an input device tree. So when the Dom0 kernel
starts processing crossbar setup some interrupts might be assigned to
SPI which are not assigned to this domain and will be never delivered.

One of the option to solve the issue could be removing crossbar kernel
driver. For devices which interrupts are not routed by default to gic,
you should setup crossbar in u-boot (it was like that before moving
that driver to thekernel).  And have this properly described in DTS.
You also might be interested in this antique patch series:
https://marc.info/?l=xen-devel&m=143745896722769&w=2

Sincerely,
Andrii Anisov.

2017-12-09 13:19 GMT+02:00 RAMYA RAVICHANDRAN <ramya.r@xxxxxxxxxxxxxxxxxxx>:
>
> Hello Andrii and Embedded PV developers,
>
> Thanks for your prompt hints.
> There is a modification in the present device tree used for latest J6 
> Processor SDK.
> The modification is the peripherals' interrupts are connected via 
> CROSSBAR_MPU to GIC.
>
> It would be great if  suggest any procedure/ best practices to accomodate the 
> above in Xen?
>

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