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Re: [FuSa SIG] [RFC 7/7] arm/gic-v3: add GIC version suffix to iomem range variables
- To: Stefano Stabellini <sstabellini@xxxxxxxxxx>, Andrii Anisov <andrii.anisov@xxxxxxxxx>
- From: Andrii Anisov <Andrii_Anisov@xxxxxxxx>
- Date: Thu, 21 Nov 2019 09:05:33 +0000
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- Thread-topic: [RFC 7/7] arm/gic-v3: add GIC version suffix to iomem range variables
Hello Stefano,
I suppose, in the discussion with ARM, it might be useful to come with existing support case numbers.
Here they are:
ANDRII ANISOV
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From: Stefano Stabellini <sstabellini@xxxxxxxxxx>
Sent: Thursday, November 21, 2019 12:23 AM
To: Andrii Anisov <andrii.anisov@xxxxxxxxx>
Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>; xen-devel@xxxxxxxxxxxxxxxxxxxx <xen-devel@xxxxxxxxxxxxxxxxxxxx>; Andrii Anisov <Andrii_Anisov@xxxxxxxx>; Julien Grall <julien@xxxxxxx>; Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>; fusa-sig@xxxxxxxxxxxxxxxxxxxx
<fusa-sig@xxxxxxxxxxxxxxxxxxxx>; lars.kurth.xen@xxxxxxxxx <lars.kurth.xen@xxxxxxxxx>
Subject: Re: [RFC 7/7] arm/gic-v3: add GIC version suffix to iomem range variables
On Thu, 14 Nov 2019, Andrii Anisov wrote:
> Hello Stefano,
>
> On 11.11.19 22:59, Stefano Stabellini wrote:
> > this seems a very serious compiler bug.
>
> Yep.
>
> > This, together with the other bug described in the previous patch, makes
> > me think the ARMCC is not quite ready for showtime.
>
> Yet, this particular ARM Compiler version is safety certified and LTS.
>
> > Do you know if there
> > are any later version of the compiler that don't have these problems?
>
> I don't know, ARM did not say something special about it. As I know, the
> reason to take this compiler version was that it is the "latest and greatest"
> safety certified
>
> > I would hate to introduce these workarounds
>
> I hated finding and publishing these workarounds, but here we are.
>
> The main question here is if XEN needs a tag "Support safety certified
> compiler" by the cost of accepting such workarounds.
> Then discuss how to reduce their stench.
Before we get to that point, maybe we can raise the issue with Arm using
our combined channels. I'll raise it internally at Xilinx, and we could
also discuss it during one of the next FuSa calls (list in CC).
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